CDCFR83_08 Datasheet, PDF (3/15 Pages) Texas Instruments – Direct Rambus Clock generator

CDCFR83
DIRECT RAMBUS CLOCK GENERATOR
SCAS665B − APRIL 2001 REVISED OCTOBER 2005
Terminal Functions
TERMINAL
NAME
NO.
CLK
20
CLKB
18
GNDC
8
GNDI
5
GNDO
17, 21
GNDP
4
MULT0
15
MULT1
14
NC
19
PCLKM
6
PWRDNB
12
REFCLK
2
S0
24
S1
23
S2
13
STOPB
11
SYNCLKN
7
VDDC
VDDIPD
VDDIR
VDDO
VDDP
9
10
1
16, 22
3
I/O
DESCRIPTION
O Output clock
O Output clock (complement)
GND for phase aligner
GND for control inputs
GND for clock outputs
GND for PLL
I PLL multiplier select
I PLL multiplier select
Not used
I Phase detector input
I Active low power down
I Reference clock
I Mode control
I Mode control
I Mode control
I Active low output disable
I Phase detector input
VDD for phase aligner
Reference voltage for phase detector inputs and STOPB
Reference voltage for REFCLK
VDD for clock outputs
VDD for PLL
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
3