CD74HCU04_15 Datasheet, PDF (3/15 Pages) Texas Instruments – High-Speed CMOS Logic Hex Inverter

CD74HCU04
Absolute Maximum Ratings
DC Supply Voltage, V_CC
Voltages Referenced to Ground . . . . . . . . . . . . . . . . -0.5V to +7V
DC Input Diode Current, I_IK
For V_I < -0.5V or V_I > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, I_OK
For V_O < -0.5V or V_O > V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±20mA
DC Drain Current, per Output, I_O
For V_O > -0.5V or V_O < V_CC + 0.5V . . . . . . . . . . . . . . . . . . . .±25mA
DC V_CC or Ground Current, I_CC . . . . . . . . . . . . . . . . . . . . . . . . .±50mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W)
E (PDIP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
M (SOIC) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
PW (TSSOP) Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
Maximum Junction Temperature (Hermetic Package or Die) . . . 175^oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . .-65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300^oC
(SOIC - Lead Tips Only)
Operating Conditions
Temperature Range T_A. . . . . . . . . . . . . . . . . . . . . . . -55^oC to 125^oC
Supply Voltage Range, V_CC . . . . . . . . . . . . . . . . . . . . . . . . .2V to 6V
DC Input or Output Voltage, V_I, V_O . . . . . . . . . . . . . . . . . 0V to V_CC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating, and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. The package thermal impedance is calculated in accordance with JESD 51-7.
DC Electrical Specifications
PARAMETER
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
CMOS Loads
High Level Output
Voltage
TTL Loads
Low Level Output
Voltage
CMOS Loads
Low Level Output
Voltage
TTL Loads
Input Leakage
Current
Quiescent Device
Current
SYMBOL
V_IH
V_IL
V_OH
TEST
CONDITIONS
V_I (V) I_O (mA) V_CC (V)
-
-
2
4.5
6
-
-
2
4.5
6
V_{IH or} -0.02
2
V_IL
-0.02
4.5
-0.02
6
V_CC or
-4
4.5
GND
-5.2
6
V_OL
V_{IH or} 0.02
2
V_IL
0.02
4.5
0.02
6
4
4.5
V_CC or 5.2
6
GND
I_I
V_CC or
-
6
GND
I_CC
V_CC or
0
6
GND
25^oC
MIN MAX
1.7
-
3.6
-
4.8
-
-
0.3
-
0.8
-
1.1
1.8
-
4
-
5.5
-
3.98
-
5.48
-
-
0.2
-
0.5
-
0.5
-
0.26
-
0.26
-
±0.1
-
2
-40^oC TO +85^oC
MIN MAX
1.7
-
3.6
-
4.8
-
-
0.3
-
0.8
-
1.1
1.8
-
4
-
5.5
-
3.84
-
5.34
-
-55^oC TO 125^oC
MIN MAX
1.7
-
3.6
-
4.8
-
-
0.3
-
0.8
-
1.1
1.8
-
4
-
5.5
-
3.7
-
5.2
-
UNITS
V
V
V
V
V
V
V
V
V
V
V
-
0.2
-
0.2
V
-
0.5
-
0.5
V
-
0.5
-
0.5
V
-
0.33
-
0.4
V
-
0.33
-
0.4
V
-
±1
-
±1
µA
-
20
-
40
µA
3