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ADS7883_14 Datasheet, PDF (3/20 Pages) Texas Instruments – 12-BIT, 3-MSPS, MICROPOWER, MINIATURE SAR ANALOG-TO-DIGITAL CONVERTER
ADS7883
www.ti.com ....................................................................................................................................................................................................... SLAS594 – JULY 2008
ELECTRICAL SPECIFICATIONS
VDD = 2.7 V to 5.5 V, TA = –40°C to 125°C, fsample = 2 MSPS for VDD = 2.7 V to 4.5 V, fsample = 3 MSPS for VDD = 4.5 V to 5.5
V
PARAMETER
ANALOG INPUT
Full-scale input voltage span(1)
Absolute input voltage range
CI
Input capacitance(2)
IIlkg
Input leakage current
SYSTEM PERFORMANCE
Resolution
No missing codes
ADS7883SB
ADS7883S
INL
Integral nonlinearity
ADS7883SB
ADS7883S
DNL Differential nonlinearity
EO
Offset error(4)(5)(6)
EG
Gain error(5)
SAMPLING DYNAMICS
ADS7883SB
ADS7883S
Conversion time
Acquisition time
Maximum throughput rate
Aperture delay
DYNAMIC CHARACTERISTICS
THD
Total harmonic distortion(7)
SINAD Signal-to-noise and distortion
SFDR Spurious free dynamic range
Full power bandwidth
DIGITAL INPUT/OUTPUT
Logic family — CMOS
VIH
High-level input voltage
VIL
Low-level input voltage
VOH
High-level output voltage
VOL
Low-level output voltage
POWER SUPPLY REQUIREMENTS
+VDD Supply voltage
TEST CONDITIONS
+IN
TA = 125°C
32-MHz SCLK, VDD = 3 V
48-MHz SCLK, VDD = 5 V
32-MHz SCLK, VDD = 3 V
48-MHz SCLK, VDD = 5 V
32-MHz SCLK, VDD = 2.7 V to 4.5 V
48-MHz SCLK, VDD = 4.5 V to 5.5 V
fI = 100 kHz
fI = 100 kHz, ADS7883SB
fI = 100 kHz, ADS7883S
fI = 100 kHz
At –3 dB
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
VDD = 2.7 V to 3.6 V
VDD = 3.6 V to 5.5 V
At Isource = 200 µA
At Isink = 200 µA
MIN TYP
MAX UNIT
0
–0.2
VDD V
VDD+0.2 V
27
pF
40
nA
12
12
11
–1 ±0.6
–2 ±0.75
–1 ±0.5
–2 ±0.75
–3 ±0.2
–3.5 ±0.3
Bits
Bits
1 LSB(3)
2
1
LSB
2
3 LSB
3.5 LSB
398 422
265 281
78
52
10
ns
ns
2
MHz
3
ns
–84
69
72
68
70
86
30
dB
dB
dB
MHz
1.5
2.2
VDD–0.2
2.7 3.3
5.5
V
5.5
0.4
V
0.8
V
0.4
5.5 V
(1) Ideal input span; does not include gain or offset error
(2) Refer to Figure 24 for details on sampling circuit
(3) LSB means least significant bit
(4) Measured relative to an ideal full-scale input
(5) Offset error and gain error ensured by characterization
(6) First transition of 000H to 001H at (Vref/210)
(7) Calculated on the first nine harmonics of the input frequency
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): ADS7883
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