English
Language : 

ADS7812_15 Datasheet, PDF (3/25 Pages) Texas Instruments – Low-Power, Serial 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTER
SPECIFICATIONS (Cont.)
At TA = –40°C to +85°C, fS = 40kHz, VS = +5V ±5%, using internal reference, unless otherwise specified.
ADS7812P, U
ADS7812PB, UB
PARAMETER
SAMPLING DYNAMICS
Aperture Delay
Aperture Jitter
Transient Response
Overvoltage Recovery(7)
REFERENCE
Internal Reference Voltage
Internal Reference Source Current
Internal Reference Drift
External Reference Voltage Range
External Reference Current Drain
DIGITAL INPUTS
Logic Levels
VIL
VIH(8)
IIL
IIH
DIGITAL OUTPUTS
Data Format
Data Coding
VOL
VOH
Leakage Current
Output Capacitance
POWER SUPPLY
VS
Power Dissipation
TEMPERATURE RANGE
Specified Performance
Derated Performance
CONDITIONS
FS Step
VREF = +2.5V
ISINK = 1.6mA
ISOURCE = 500µA
High-Z State,
VOUT = 0V to VS
High-Z State
fS = 40kHz
MIN
TYP
MAX
MIN
40
20
5
750
2.48
2.5
2.52
✻
100
8
2.3
2.5
2.7
✻
100
TYP
MAX
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
✻
–0.3
+0.8
✻
✻
+2.0
VS +0.3V
✻
✻
±10
✻
±10
✻
Serial
Binary Two’s Complement
+0.4
✻
+4
✻
±1
✻
15
15
+4.75
+5
+5.25
✻
✻
✻
35
✻
–40
+85
✻
✻
–55
+125
✻
✻
UNITS
ns
ps
µs
ns
V
µA
ppm/°C
V
µA
V
V
µA
µA
V
V
µA
pF
V
mW
°C
°C
✻ Same specification as grade to the left.
NOTES: (1) LSB means Least Significant Bit. For the ±10V input range, one LSB is 4.88mV. (2) Typical rms noise at worst case transitions and temperatures.
(3) Full scale error is the worst case of –Full Scale or +Full Scale untrimmed deviation from ideal first and last code transitions, divided by the transition voltage
(not divided by the full-scale range) and includes the effect of offset error. (4) After the ADS7812 is initially powered on and fully settles, this is the time delay after
it is brought out of Power Down Mode until all internal settling occurs and the analog input is acquired to rated accuracy, and normal conversions can begin again.
(5) All specifications in dB are referred to a full-scale input. (6) Useable Bandwidth defined as Full-Scale input frequency at which Signal-to-(Noise+Distortion)
degrades to 60dB, or 10 bits of accuracy. (7) Recovers to specified performance after 2 x FS input overvoltage. (8) The minimum VIH level for the DATACLK signal
is 3V.
ADS7812
3
SBAS042A
www.ti.com