TPS54260-EP Datasheet, PDF (28/50 Pages) Texas Instruments – 3.5-V to 60-V Step-Down Converter With Eco-mode Control Scheme

TPS54260-EP
SLVSDN9 – DECEMBER 2016
Device Functional Modes (continued)
TPS54260-EP
EN
SS/TR
PWRGD
VOUT 1
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TPS54260-EP
EN
R1
SS/ TR
R2
PWRGD
VOUT 2
R3
R4
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Figure 42. Schematic for Ratiometric and Simultaneous Start-Up Sequence
Ratiometric and simultaneous power supply sequencing can be implemented by connecting the resistor network
of R1 and R2 shown in Figure 42 to the output of the power supply that needs to be tracked or another voltage
reference source. Using Equation 24 and Equation 25, the tracking resistors can be calculated to initiate the
Vout2 slightly before, after or at the same time as Vout1. Equation 26 is the voltage difference between Vout1
and Vout2 at the 95% of nominal output regulation.
The deltaV variable is zero volts for simultaneous sequencing. To minimize the effect of the inherent SS/TR to
VSENSE offset (Vssoffset) in the slow-start circuit and the offset created by the pullup current source (Iss) and
tracking resistors, the Vssoffset and Iss are included as variables in the equations.
To design a ratio-metric start up in which the Vout2 voltage is slightly greater than the Vout1 voltage when Vout2
reaches regulation, use a negative number in Equation 24 through Equation 26 for deltaV. Equation 26 results in
a positive number for applications which the Vout2 is slightly lower than Vout1 when Vout2 regulation is
achieved.
Because the SS/TR pin must be pulled below 40 mV before starting after an EN, UVLO or thermal shutdown
fault, careful selection of the tracking resistors is needed to ensure the device restarts after a fault. Make sure the
calculated R1 value from Equation 24 is greater than the value calculated in Equation 27 to ensure the device
can recover from a fault.
As the SS/TR voltage becomes more than 85% of the nominal reference voltage the Vssoffset becomes larger
as the slow-start circuits gradually handoff the regulation reference to the internal voltage reference. The SS/TR
pin voltage needs to be greater than 1.3 V for a complete handoff to the internal voltage reference as shown in
Figure 19.
Vout2 + deltaV Vssoffset
R1 =
´
VREF
Iss
(24)
R2 =
VREF ´ R1
Vout2 + deltaV - VREF
(25)
28
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