TPA3250D2 Datasheet, PDF (28/41 Pages) Texas Instruments – 70-W Stereo, 130-W peak PurePath Ultra-HD Pad Down Class-D Amplifier

TPA3250D2
SLASE99 – DECEMBER 2015
11 Power Supply Recommendations
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11.1 Power Supplies
The TPA3250D2 device requires two external power supplies for proper operation. A high-voltage supply called
PVDD is required to power the output stage of the speaker amplifier and its associated circuitry. Additionally, one
mid-voltage power supply for GVDD_X and VDD is required to power the gate-drive and other internal digital and
analog portions of the device. The allowable voltage range for both the PVDD and the GVDD_X/VDD supplies
are listed in the Recommended Operating Conditions table. Ensure both the PVDD and the GVDD_X/VDD
supplies can deliver more current than listed in the Electrical Characteristics table.
11.1.1 VDD Supply
The VDD supply required from the system is used to power several portions of the device. It provides power to
internal regulators DVDD and AVDD that are used to power digital and analog sections of the device,
respectively. Proper connection, routing, and decoupling techniques are highlighted in the TPA3250D2 device
EVM User's Guide SLVUAG8 (as well as the Application Information section and Layout Examples section) and
must be followed as closely as possible for proper operation and performance. Deviation from the guidance
offered in the TPA3250D2 device EVM User's Guide, which followed the same techniques as those shown in the
Application Information section, may result in reduced performance, errant functionality, or even damage to the
TPA3250D2 device. Some portions of the device also require a separate power supply which is a lower voltage
than the VDD supply. To simplify the power supply requirements for the system, the TPA3250D2 device includes
integrated low-dropout (LDO) linear regulators to create these supplies. These linear regulators are internally
connected to the VDD supply and their outputs are presented on AVDD and DVDD pins, providing a connection
point for an external bypass capacitors. It is important to note that the linear regulators integrated in the device
have only been designed to support the current requirements of the internal circuitry, and should not be used to
power any additional external circuitry. Additional loading on these pins could cause the voltage to sag and
increase noise injection, which negatively affects the performance and operation of the device.
11.1.2 GVDD_X Supply
The GVDD_X supply required from the system is used to power the gate-drives for the output H-bridges. Proper
connection, routing, and decoupling techniques are highlighted in the TPA3250D2 device EVM User's Guide
SLVUAG8 (as well as the Application Information section and Layout Examples section) and must be followed as
closely as possible for proper operation and performance. Deviation from the guidance offered in the
TPA3250D2 device EVM User's Guide, which followed the same techniques as those shown in the Application
Information section, may result in reduced performance, errant functionality, or even damage to the TPA3250D2
device.
11.1.3 PVDD Supply
The output stage of the speaker amplifier drives the load using the PVDD supply. This is the power supply which
provides the drive current to the load during playback. Proper connection, routing, and decoupling techniques are
highlighted in the TPA3250D2 device EVM User's Guide SLVUAG8 (as well as the Application Information
section and Layout Examples section) and must be followed as closely as possible for proper operation and
performance. Due the high-voltage switching of the output stage, it is particularly important to properly decouple
the output power stages in the manner described in the TPA3250D2 device EVM User's Guide SLVUAG8. The
lack of proper decoupling, like that shown in the EVM User's Guide, can results in voltage spikes which can
damage the device, or cause poor audio performance and device shutdown faults.
11.2 Powering Up
The TPA3250D2 does not require a power-up sequence, but it is recommended to hold RESET low minimum
400ms after PVDD supply voltage is turned ON. The outputs of the H-bridges remain in a high-impedance state
until the gate-drive supply voltage (GVDD_X) and VDD voltage are above the undervoltage protection (UVP)
voltage threshold (see the Electrical Characteristics table of this data sheet). This allows an internal circuit to
charge the external bootstrap capacitors by enabling a weak pulldown of the half-bridge output as well as
initiating a controlled ramp up sequence of the output voltage.
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