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LM3S1816 Datasheet, PDF (28/797 Pages) Texas Instruments – Stellaris® LM3S1816 Microcontroller | |||
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Revision History
Table 1. Revision History (continued)
Date
December 2010
Revision
8832
Description
â Information on Advanced Encryption Standard (AES) cryptography tables and Cyclic Redundancy
Check (CRC) error detection functionality was inadvertently omitted from some datasheets. This
has been added.
â In APINT register, changed bit name from SYSRESETREQ to SYSRESREQ.
â Added DEBUG (Debug Priority) bit field to SYSPRI3 register.
â Clarified Flash memory caution.
â Restructured the General-Purpose Timer chapter to combine duplicated text.
â Combined High and Low bit fields in GPTMTAILR, GPTMTAMATCHR, GPTMTAR, GPTMTAV,
GPTMTBILR, GPTMTAMATCHR, GPTMTBR and GPTMTBV registers for compatibility with future
releases.
â Removed mention of false-start bit detection in the UART chapter. This feature is not supported.
â Changed I2C master and slave register base addresses and offsets to be relative to I2C module
base, so register base and offsets were changed for all I2C slave registers.
â In Electrical Characteristics chapter:
â Added single-ended clock source input voltage values to "Recommended DC Operating
Conditions" table.
â Deleted Oscillation mode value from "MOSC Oscillator Input Characteristics" table.
â Added TVDD2_3 supply voltage parameter to "Reset Characteristics" table.
â Added "Power-On Reset and Voltage Parameters" timing diagram.
â Added tVDDRISE_HIB supply voltage parameter to "Hibernation Module AC Characteristics" table.
â Added "VDD Ramp when Waking from Hibernation" timing diagram.
28
January 21, 2012
Texas Instruments-Production Data
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