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LM3S1J11 Datasheet, PDF (27/851 Pages) Texas Instruments – Stellaris® LM3S1J11 Microcontroller
Stellaris® LM3S1J11 Microcontroller
Table 1. Revision History (continued)
Date
Revision Description
– In SSI Characteristics table, corrected value for parameter "SSIClk cycle time".
– Deleted erroneously included Ethernet Controller tables, since this part does not have Ethernet.
– In Analog Comparator Characteristics table, added parameter "Input voltage range" and corrected
values for parameter "Input common mode voltage range".
– In Analog Comparator Voltage Reference Characteristics table, corrected values for absolute
accuracy parameters.
– Deleted table "USB Controller DC Characteristics".
– In Nominal Power Consumption table, added parameter for sleep mode.
– In Maximum Current Consumption section, changed reference value for MOSC and temperature
in tables that follow.
– Deleted table "External VDDC Source Current Specifications".
■ Additional minor data sheet clarifications and corrections.
July 2011
9970
■ Corrected "Reset Sources" table.
■ Added missing PICAL (PIOSC Calibrate) bit to DC4 register.
■ Added Important Note that RCC register must be written before RCC2 register.
■ Added a note that all GPIO signals are 5-V tolerant when configured as inputs except for PB0 and
PB1, which are limited to 3.6 V.
■ Note that the state of the HSE bit in the UARTCTL register has no effect on clock generation in ISO
7816 smart card mode (when the SMART bit in the UARTCTL register is set).
■ Corrected LIN Mode bit names in UART Interrupt Clear (UARTICR) register.
■ Corrected pin number for RST in table "Connections for Unused Signals" (other pin tables were
correct).
■ In the "Operating Characteristics" chapter:
– In the "Thermal Characteristics" table, the Thermal resistance value was changed.
– In the "ESD Absolute Maximum Ratings" table, the VESDCDM parameter was changed and the
VESDMM parameter was deleted.
■ The "Electrical Characteristics" chapter was reorganized by module. In addition, some of the
Recommended DC Operating Conditions, LDO Regulator, Clock, GPIO, Hibernation Module, ADC,
and SSI characteristics were finalized.
■ Added missing ordering table.
■ Additional minor data sheet clarifications and corrections.
January 21, 2012
27
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