DAC5674 Datasheet, PDF(27/39 Page) Texas Instruments – 14BIT 400 MSPS, 2 X/ 4X INTERPOLATING COMMS DAC DIGITAL TO ANALOG CONVERTER

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DAC5674 Datasheet, PDF (27/39 Pages) Texas Instruments – 14BIT 400 MSPS, 2 X/ 4X INTERPOLATING COMMS DAC DIGITAL TO ANALOG CONVERTER

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DAC5674

SLWS148A â SEPTEMBER 2003 â REVISED OCTOBER 2005

VOUT1 + IOUT1

RL + IOUTFS

CODE

16384

VOUT2 + IOUT2

RL + IOUTFS

16383 * CODE

16384

The differential output voltage VOUTDIFF can thus be expressed as:

VOUTDIFF + VOUT1 * VOUT2 + IOUTFS

2CODE * 16383

16384

The latter equation shows that applying the differential output results in doubling of the signal power delivered

to the load. Because the output currents IOUT1 and IOUT2 are complementary, they become additive when

processed differentially. Note that care should be taken not to exceed the compliance voltages at node IOUT1

and IOUT2, which would lead to increased signal distortion.

Reference Operation

The DAC5674 comprises a band-gap reference and control amplifier for biasing the full-scale output current.

The full-scale output current is set by applying an external resistor RBIAS. The bias current IBIAS through resistor

RBIAS is defined by the on-chip band-gap reference voltage and control amplifier. The full-scale output current

equals 32 times this bias current. The full-scale output current IOUTFS can thus be expressed as:

IOUTFS + 32

IBIAS +

VEXTIO

RBIAS

where VEXTIO is the voltage at terminal EXTIO. The band-gap reference voltage delivers an accurate voltage

of 1.2 V. This reference is active when terminal EXTLO is connected to AGND. An external decoupling capacitor

CEXT of 0.1 ÂµF should be connected externally to terminal EXTIO for compensation. The band-gap reference

can additionally be used for external reference operation. In that case, an external buffer with high impedance

input should be applied in order to limit the band-gap load current to a maximum of 100 nA. The internal

reference can be disabled and overridden by an external reference by connecting EXTLO to AVDD. In this case,

capacitor CEXT can be omitted. Terminal EXTIO serves as either input or output node.

The full-scale output current can be adjusted from 20 mA to 2 mA by varying resistor RBIAS or changing the

externally applied reference voltage. The internal control amplifier has a wide input range, supporting the

full-scale output current range of 20 mA.

Analog Current Outputs

Figure 34 shows a simplified schematic of the current source array output with corresponding switches.

Differential switches direct the current of each individual PMOS current source to either the positive output node

IOUT1 or its complementary negative output node IOUT2. The output impedance is determined by the stack

of the current sources and differential switches, and is typically >300 kâ¦ in parallel with an output capacitance

of 5 pF.

The external output resistors are referred to an external ground. The minimum output compliance at nodes

IOUT1 and IOUT2 is limited to â1 V, determined by the CMOS process. Beyond this value, transistor breakdown

may occur resulting in reduced reliability of the DAC5674 device. The maximum output compliance voltage at

nodes IOUT1 and IOUT2 equals 1.25 V. Exceeding the maximum output compliance voltage adversely affects

distortion performance and integral nonlinearity. The optimum distortion performance for a single-ended or

differential output is achieved when the maximum full-scale signal at IOUT1 and IOUT2 does not exceed 0.5 V.

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