LM3S5752 Datasheet, PDF (26/848 Pages) Texas Instruments – Stellaris® LM3S5752 Microcontroller

Table of Contents
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USB Receive Byte Count Endpoint 0 (USBCOUNT0), offset 0x108 ................................... 719
USB Type Endpoint 0 (USBTYPE0), offset 0x10A ............................................................ 720
USB NAK Limit (USBNAKLMT), offset 0x10B .................................................................. 721
USB Transmit Control and Status Endpoint 1 Low (USBTXCSRL1), offset 0x112 ............... 722
USB Transmit Control and Status Endpoint 2 Low (USBTXCSRL2), offset 0x122 ............... 722
USB Transmit Control and Status Endpoint 3 Low (USBTXCSRL3), offset 0x132 ............... 722
USB Transmit Control and Status Endpoint 1 High (USBTXCSRH1), offset 0x113 .............. 726
USB Transmit Control and Status Endpoint 2 High (USBTXCSRH2), offset 0x123 ............. 726
USB Transmit Control and Status Endpoint 3 High (USBTXCSRH3), offset 0x133 ............. 726
USB Maximum Receive Data Endpoint 1 (USBRXMAXP1), offset 0x114 ........................... 730
USB Maximum Receive Data Endpoint 2 (USBRXMAXP2), offset 0x124 ........................... 730
USB Maximum Receive Data Endpoint 3 (USBRXMAXP3), offset 0x134 ........................... 730
USB Receive Control and Status Endpoint 1 Low (USBRXCSRL1), offset 0x116 ............... 731
USB Receive Control and Status Endpoint 2 Low (USBRXCSRL2), offset 0x126 ............... 731
USB Receive Control and Status Endpoint 3 Low (USBRXCSRL3), offset 0x136 ............... 731
USB Receive Control and Status Endpoint 1 High (USBRXCSRH1), offset 0x117 .............. 736
USB Receive Control and Status Endpoint 2 High (USBRXCSRH2), offset 0x127 .............. 736
USB Receive Control and Status Endpoint 3 High (USBRXCSRH3), offset 0x137 .............. 736
USB Receive Byte Count Endpoint 1 (USBRXCOUNT1), offset 0x118 .............................. 740
USB Receive Byte Count Endpoint 2 (USBRXCOUNT2), offset 0x128 .............................. 740
USB Receive Byte Count Endpoint 3 (USBRXCOUNT3), offset 0x138 .............................. 740
USB Host Transmit Configure Type Endpoint 1 (USBTXTYPE1), offset 0x11A ................... 741
USB Host Transmit Configure Type Endpoint 2 (USBTXTYPE2), offset 0x12A ................... 741
USB Host Transmit Configure Type Endpoint 3 (USBTXTYPE3), offset 0x13A ................... 741
USB Host Transmit Interval Endpoint 1 (USBTXINTERVAL1), offset 0x11B ....................... 742
USB Host Transmit Interval Endpoint 2 (USBTXINTERVAL2), offset 0x12B ....................... 742
USB Host Transmit Interval Endpoint 3 (USBTXINTERVAL3), offset 0x13B ....................... 742
USB Host Configure Receive Type Endpoint 1 (USBRXTYPE1), offset 0x11C ................... 743
USB Host Configure Receive Type Endpoint 2 (USBRXTYPE2), offset 0x12C ................... 743
USB Host Configure Receive Type Endpoint 3 (USBRXTYPE3), offset 0x13C ................... 743
USB Host Receive Polling Interval Endpoint 1 (USBRXINTERVAL1), offset 0x11D ............. 744
USB Host Receive Polling Interval Endpoint 2 (USBRXINTERVAL2), offset 0x12D ............ 744
USB Host Receive Polling Interval Endpoint 3 (USBRXINTERVAL3), offset 0x13D ............ 744
USB Request Packet Count in Block Transfer Endpoint 1 (USBRQPKTCOUNT1), offset
0x304 ........................................................................................................................... 745
USB Request Packet Count in Block Transfer Endpoint 2 (USBRQPKTCOUNT2), offset
0x308 ........................................................................................................................... 745
USB Request Packet Count in Block Transfer Endpoint 3 (USBRQPKTCOUNT3), offset
0x30C ........................................................................................................................... 745
USB Receive Double Packet Buffer Disable (USBRXDPKTBUFDIS), offset 0x340 ............. 746
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS), offset 0x342 ............ 747
USB External Power Control (USBEPC), offset 0x400 ...................................................... 748
USB External Power Control Raw Interrupt Status (USBEPCRIS), offset 0x404 ................. 751
USB External Power Control Interrupt Mask (USBEPCIM), offset 0x408 ............................ 752
USB External Power Control Interrupt Status and Clear (USBEPCISC), offset 0x40C ......... 753
USB Device RESUME Raw Interrupt Status (USBDRRIS), offset 0x410 ............................ 754
USB Device RESUME Interrupt Mask (USBDRIM), offset 0x414 ....................................... 755
USB Device RESUME Interrupt Status and Clear (USBDRISC), offset 0x418 .................... 756
USB General-Purpose Control and Status (USBGPCS), offset 0x41C ............................... 757
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November 17, 2011
Texas Instruments-Production Data