BQ25570_14 Datasheet, PDF (26/41 Pages) Texas Instruments – Ultra Low Power Harvester Power Management IC with Boost Charger, and Nano-Powered Buck Converter

bq25570
SLUSBH2C – MARCH 2013 – REVISED JANUARY 2014
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Step Down (Buck) Converter Operation
The buck regulator takes input power from VSTOR, steps it down and provides a regulated voltage at the OUT
pin. It employs pulse frequency modulation (PFM) control to regulate the voltage close to the desired reference
voltage. The reference voltage is set by the user programmed resistor divider. The current through the inductor is
controlled through internal current sense circuitry. The peak current in the inductor is controlled to maintain high
efficiency of the converter across a wide input current range. The converter delivers an output current up to
110mA typical with a peak inductor current of 200 mA. The buck regulator is disabled when the voltage on
VSTOR drops below the VBAT_UV condition. The buck regulator continues to operate in pass (100% duty cycle)
mode, passing the input voltage to the output, as long as VSTOR is greater than VBAT_UV and less than VOUT.
Programming OUT Regulation Voltage
To set the proper output regulation voltage and input voltage power good comparator, the external resistors must
be carefully selected.
The OUT regulation voltage is then given by Equation 5:
VOUT
=
æ
VBIAS _ç
R_OUT2
+
R_OUT1
ö
÷
è
R_OUT1
ø
(5)
Note that VBIAS is nominally 1.21V per the electrical specification table. The sum of the resistors is
recommended to be no greater than 13 MΩ , that is, R_OUT1 + R_OUT2 = 13 MΩ. Higher resistors may result in poor
output voltage regulation and/or input voltage power good threshold accuracies due to noise pickup via the high
impedance pins or reduction of effective resistance due to parasitic resistances created from board assembly
residue. See Layout Considerations section for more details. SLUC484 provides help on sizing and selecting the
resistors.
Buck Converter Startup Behavior
The bq25570 buck converter has two startup responses: 1) from the ship-mode state (EN transitions from high to
low), and 2) from the standby state (VOUT_EN transitions from low to high). The first startup response out of the
ship-mode state has the longest time duration due to the internal circuitry being disabled. This response is shown
in Figure 28. The startup time takes approximately 100ms due to the internal Nano-Power management circuitry
needing to first, complete the 64 ms sample and hold cycle.
Startup from the standby state is shown in Figure 29. This response is much faster due to the internal circuitry
being pre-enabled. The startup time from this state is entirely dependent on the size of the output capacitor. The
larger the capacitor, the longer it will take to charge during startup. With COUT = 22 µF, the startup time is
approximately 400 µs. The buck converter can startup into a pre-biased output voltage.
Steady State Operation and Cycle by Cycle Behavior
Steady state operation for the boost charger is shown in Figure 33 and for the buck converter in
Figure 34. These plots highlight the inductor current waveform, the VSTOR and VOUT voltage ripple, and the
LBOOST and LBUCK switching nodes, respectively. Both use hysteretic control and pulse frequency modulation
(PFM) switching in order to maintain high efficiency at light load. As long as the VIN_DC voltage is above the
MPPT regulation set point (i.e. voltage at VREF_SAMP), the boost charger's low-side power FET turns on and
draws current until it reaches its respective peak current limit. These switching bursts continue until VSTOR
reaches the VBAT_OV threshold. The buck converter high-side power FET also turns on and draws current until
it reaches its respective peak current limit, with its switching bursts continuing until VOUT reaches the
VOUT_SET point. This cycle-by-cycle minor switching frequency is a function of each converter's inductor value,
peak current limit and voltage levels on each side of each inductor.
Once each respective capacitor, CSTOR for the boost and COUT for the buck, droops below a minimum value,
the hysteretic switching repeats. The DC voltages on CSTOR and COUT have a ripple voltage riding on top,
caused by each capacitor charging due to the switching bursts and then discharging to a minimum value. The
major frequency and duty cycle of CSTOR's ripple are a function of the VIN_DC regulation, VSTOR system load
and/or VBAT charging current, L1 inductance value and CSTOR capacitance value. The major frequency and
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