LMV831_15 Datasheet, PDF (25/37 Pages) Texas Instruments – LMV831 Single/ LMV832 Dual/ LMV834 Quad 3.3 MHz Low Power CMOS, EMI Hardened Operational Amplifiers

www.ti.com
10 Layout
LMV831, LMV832, LMV834
SNOSAZ6C – AUGUST 2008 – REVISED NOVEMBER 2015
10.1 Layout Guidelines
• Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as close
to the device as possible. A single bypass capacitor from V+ to ground is applicable for single-supply
applications.
• For single-supply, place a capacitor between V⁺ and V^−.
• For dual supplies, place one capacitor between V⁺ and the board ground, and a second capacitor between
ground and V^−.
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and operational
amplifier itself. Bypass capacitors are used to reduce the coupled noise by providing low-impedance power
sources local to the analog circuitry.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pick-up. Make sure to physically separate digital
and analog grounds paying attention to the flow of the ground current. For more detailed information refer to
Circuit Board Layout Techniques, SLOA089.
• In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as
possible. If it is not possible to keep them separate, it is much better to cross the sensitive trace perpendicular
as opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible, keeping RF and RG close to the inverting
input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
Even with the LMV83x inherent hardening against EMI, TI still recommends to keep the input traces short and as
far as possible from RF sources. Then the RF signals entering the chip are as low as possible, and the
remaining EMI can be, almost, completely eliminated in the chip by the EMI reducing features of the LMV83x.
10.2 Layout Example
Figure 51. SOT-23 Noninverting Layout Example
Copyright © 2008–2015, Texas Instruments Incorporated
Submit Documentation Feedback
25
Product Folder Links: LMV831 LMV832 LMV834