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DAC7562_15 Datasheet, PDF (25/60 Pages) Texas Instruments – Internal Reference
www.ti.com
DAC7562, DAC7563, DAC8162
DAC8163, DAC8562, DAC8563
SLAS719E – AUGUST 2010 – REVISED JUNE 2015
Typical Characteristics: DAC at AVDD = 2.7 V (continued)
At TA = 25°C, 2.5-V external reference used, gain = 1, and DAC output not loaded, unless otherwise noted.
3.0
4
Typical channel shown
2.5
3
2.0
2
1.5
1.0
1
Full scale
Mid scale
Zero scale
0.5
0.0
−40 −25 −10 5
20 35 50 65 80 95 110 125
Temperature (°C)
G073
0
−1
−20 −15 −10
−5 0
5
ILOAD (mA)
10 15 20
Figure 73. Power-Down Current vs Temperature
LDAC Trigger (5 V/div)
Large Signal VOUT (1 V/div)
Figure 74. DAC Output Voltage vs Load Current
LDAC Trigger (5 V/div)
Small Signal Settling (0.61 mV/div = 0.024% FSR)
Time (5 μs/div)
From Code: 0h
To Code: FFFFh
Figure 75. Full-Scale Settling Time, Rising Edge
LDAC Trigger (5 V/div)
Large Signal VOUT (1 V/div)
Small Signal Settling (0.61 mV/div = 0.024% FSR)
Large Signal VOUT (1 V/div)
Small Signal Settling (0.61 mV/div = 0.024% FSR)
Time (5 μs/div)
From Code: FFFFh
To Code: 0h
Figure 76. Full-Scale Settling Time, Falling Edge
LDAC Trigger (5 V/div)
Large Signal VOUT (1 V/div)
Small Signal Settling (0.61 mV/div = 0.024% FSR)
Time (5 μs/div)
From Code: 4000h
To Code: C000h
Figure 77. Half-Scale Settling Time, Rising Edge
Time (5 μs/div)
From Code: C000h
To Code: 4000h
Figure 78. Half-Scale Settling Time, Falling Edge
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