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ADS8674 Datasheet, PDF (25/79 Pages) Texas Instruments – 4- and 8-Channel, Single-Supply, SAR ADCs
www.ti.com
ADS8674, ADS8678
SBAS627 – JULY 2015
Figure 69 shows the voltage versus current response of the internal overvoltage protection circuit when the
device is powered on. According to this current-to-voltage (I-V) response, the current flowing into the device input
pins is limited by the 1-MΩ input impedance. However, for voltages beyond ±20 V, the internal node voltages
surpass the break-down voltage for internal transistors, thus setting the limit for overvoltage protection on the
input pins.
The same overvoltage protection circuit also provides protection to the device when the device is not powered on
and AVDD is floating with an impedance > 30 kΩ. This condition can arise when the input signals are applied
before the ADC is fully powered on. The overvoltage protection limits for this condition are shown in Table 2.
Table 2. Input Overvoltage Protection Limits When AVDD = Floating with Impedance > 30 kΩ(1)
INPUT CONDITION
(VOVP = ±11 V)
|VIN| < |VOVP| Within overvoltage range
|VIN| > |VOVP| Beyond overvoltage range
TEST
CONDITION
All input ranges
All input ranges
ADC OUTPUT
COMMENTS
Invalid
Invalid
Device is not functional but is protected internally by
the OVP circuit.
This usage condition may cause irreversible damage
to the device.
(1) AVDD = floating, GND = 0, AIN_nGND = 0 V, |VRANGE| is the maximum input voltage for any selected input range, and |VOVP| is the
break-down voltage for the internal OVP circuit. Assume that RS is approximately 0.
Figure 70 shows the voltage versus current response of the internal overvoltage protection circuit when the
device is not powered on. According to this I-V response, the current flowing into the device input pins is limited
by the 1-MΩ input impedance. However, for voltages beyond ±11 V, the internal node voltages surpass the
break-down voltage for internal transistors, thus setting the limit for overvoltage protection on the input pins.
30
20
---- ± 2.5*VREF, ---- “ 1.25*VREF
---- “ 0.625*VREF, ------“0.3125*VREF
18 -------“0.156 VREF, ---- + 2.5*VREF
12
---- + 1.25*VREF, ---- + 0.625*VREF
---- + 0.3125*VREF
6
4
±6
±18
±30
±30
±20
±10
0
10
20
30
Input Voltage (V)
C003
Figure 69. I-V Curve for an Input OVP Circuit
±4
±12
±20
±20
±12
±4
4
12
20
Input Voltage (V)
C004
Figure 70. I-V Curve for an Input OVP Circuit
(AVDD = Floating)
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