English
Language : 

ADS7251 Datasheet, PDF (25/38 Pages) Texas Instruments – ADS7x51 12-Bit, 2-MSPS and 14-Bit, 1.5-MSPS, Dual, Differential Input, Simultaneous- Sampling, Analog-to-Digital Converters with Internal Reference
www.ti.com
ADS7251, ADS7851
SBAS587A – JANUARY 2014 – REVISED APRIL 2014
Typical Application (continued)
The distortion resulting from variation in the common-mode signal is eliminated by using a fully-differential
amplifier (FDA) in an inverting gain configuration that establishes a fixed common-mode level at the ADC input.
This configuration also eliminates the requirement of rail-to-rail swing at the amplifier input. The low-power
THS4521, used as an input driver, provides exceptional ac performance because of its extremely low-distortion
and high-bandwidth specifications. The device REFOUT_x pin can be directly connected to the VOCM pin of the
THS4521 to set the output common-mode voltage to 2.5 V, as required by the ADC.
8.2.2.2 Antialiasing Filter
Converting analog-to-digital signals requires sampling an input signal at a constant rate. Any higher frequency
content in the input signal beyond half the sampling frequency is digitized and folded back into the low-frequency
spectrum. This process is called aliasing. Therefore, an analog, antialiasing filter must be used to remove the
harmonic content from the input signal before being sampled by the ADC. An antialiasing filter is designed as a
low-pass, RC filter, for which the 3-dB bandwidth is optimized based on specific application requirements (as
shown in Figure 46). For dc signals with fast transients (including multiplexed input signals), a high-bandwidth
filter is designed to allow accurately settling the signal at the ADC inputs during the small acquisition time
window. For ac signals, the filter bandwidth should be kept low to band-limit the noise fed into the ADC input,
thereby increasing the signal-to-noise ratio (SNR) of the system.
Besides filtering the noise from the front-end drive circuitry, the RC filter also helps attenuate the sampling
charge injection from the switched-capacitor input stage of the ADC. A filter capacitor, CFLT, is connected across
the ADC inputs. This capacitor helps reduce the sampling charge injection and provides a charge bucket to
quickly charge the internal sample-and-hold capacitors during the acquisition process. As a rule of thumb, the
value of this capacitor should be at least 10 times the specified value of the ADC sampling capacitance. For
these devices, the input sampling capacitance is equal to 40 pF. Thus, the value of CFLT should be greater than
400 pF. The capacitor should be a COG- or NPO-type because these capacitor types have a high-Q, low-
temperature coefficient, and stable electrical characteristics under varying voltages, frequency, and time.
Note that driving capacitive loads can degrade the phase margin of the input amplifiers, thus making the amplifier
marginally unstable. To avoid amplifier stability issues, series isolation resistors (RFLT) are used at the output of
the amplifiers. A higher value of RFLT is helpful from the amplifier stability perspective, but adds distortion as a
result of interactions with the nonlinear input impedance of the ADC. Distortion increases with source impedance,
input signal frequency, and input signal amplitude. Therefore, the selection of RFLT requires balancing the stability
and distortion of the design. For these devices, TI recommends limiting the value of RFLT to a maximum of 22 Ω
in order to avoid any significant degradation in linearity performance. The tolerance of the selected resistors can
be chosen as 1% because the use of a differential capacitor at the input balances the effects resulting from any
resistor mismatch.
RFLT ^22 
f3dB
1
2S u RFLT  RFLT u CFLT
CFLT _400 pF
RFLT ^22 
Figure 46. Antialiasing Filter
VAINP
+ ADS7851
ADS7251
AINM
GND
The input amplifier bandwidth should be much higher than the cutoff frequency of the antialiasing filter. TI
strongly recommends performing a SPICE simulation to confirm that the amplifier has more than 40° phase
margin with the selected filter. Simulation is critical because even with high-bandwidth amplifiers, some amplifiers
might require more bandwidth than others to drive similar filters. If an amplifier has less than a 40° phase margin
with 22-Ω resistors, using a different amplifier with higher bandwidth or reducing the filter cutoff frequency with a
larger differential capacitor is advisable.
In addition, the components of the antialiasing filter are such that the noise from the front-end circuit is kept low
without adding distortion to the input signal.
Copyright © 2014, Texas Instruments Incorporated
Product Folder Links: ADS7251 ADS7851
Submit Documentation Feedback
25