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TPS57140-Q1_16 Datasheet, PDF (24/53 Pages) Texas Instruments – Step-Down DC-DC Converter
TPS57140-Q1
SLVSAP3D – DECEMBER 2010 – REVISED FEBRUARY 2016
www.ti.com
Feature Description (continued)
EA = A0 ´
æ
ç1
+
è
2p
s
´ fZ1
ö
÷
ø
æç1+
è
s
2p ´
fP1
ö
÷
´
ø
æ
ç1
+
è
2p
s
´ fP2
ö
÷
ø
(16)
A0 = gmea
´ Ro ´
R2
R1 + R2
(17)
A1 = gmea
´ Ro| | R3 ´
R2
R1 + R2
(18)
1
P1 =
2p ´ Ro ´ C1
(19)
1
Z1 =
2p ´ R3 ´ C1
(20)
P2 =
1
type 2a
2p ´ R3 | | R ´ (C2 + COUT )
(21)
P2 =
1
type 2b
2p ´ R3 | | R ´ COUT
(22)
P2 =
1
type 1
2p ´ R ´ (C2 + COUT )
(23)
7.4 Device Functional Modes
7.4.1 Sequencing
The designer can implement many of the common power-supply sequencing methods using the SS/TR, EN, and
PWRGD pins. Implement the sequential method using an open-drain output of a power-on-reset pin of another
device. Figure 42 shows the sequential method using two TPS57140-Q1 devices. The power-good pin connects
to the EN pin on the TPS57140-Q1, which enables the second power supply once the primary supply reaches
regulation. If needed, a 1-nF ceramic capacitor on the EN pin of the second power supply provides a 1-ms start-
up delay. Figure 43 shows the results of Figure 42.
Figure 44 shows a method for a ratiometric start-up sequence by connecting the SS/TR pins together. The
regulator outputs ramp up and reach regulation at the same time. When calculating the slow-start time, the pullup
current source must be doubled in Equation 6. Figure 45 shows the results of Figure 44.
24
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