AMC7820_15 Datasheet, PDF (24/32 Pages) Texas Instruments – ANALOG MONITORING AND CONTROL

AMC7820 REGISTERS
This section will describe each of the registers that were shown in the memory map of Tables III and IV. The registers are
grouped according to the function they control.
AMC7820 ADC REGISTERS
The results of all ADC conversions are placed in the appropriate data register, as described in Table III. The data format of these
read-only registers is as follows:
Bit 15
MSB
A2
Bit 14
A1
Bit 13 Bit 12 Bit 11
A0
DV
D11
MSB
Bit 10 Bit 9
D10
D9
Bit 8 Bit 7
D8
D7
Bit 6 Bit 5 Bit 4
D6
D5
D4
Bit 3
D3
Bit 2 Bit 1
D2
D1
Bit 0
LSB
D0
LSB
where,
A2 - A0—Channel Address Bits. These three bits will correspond to the address of the channel whose result is in the lower 12 bits.
DV—Data Valid. This bit is set (“1”) when a new conversion result is placed in the register. The DV bit is cleared (“0”) after the
register is read. This allows software to determine if the result it has read from the register is the result of a new conversion
or a previously read result. This bit is also cleared upon power-up or reset of the AMC7820.
D11 - D0—Data bits from the ADC conversion.
Upon power-up, the data registers are cleared to all zeros. This also occurs with a hardware or software RESET. Since the ADC
operates at 100K samples/second (10µs per conversion), the host should allow at least 80µs before reading any ADC channels
to allow the multiplexer time to scan through all eight channels and write valid data to the data registers.
AMC7820 DAC REGISTERS
The data to be written to the DAC is written into one of the three DAC data registers that are formatted as follows:
Bit 15
MSB
X
Bit 14
X
Bit 13 Bit 12 Bit 11
X
X
DB11
MSB
Bit 10 Bit 9
DB10 DB9
Bit 8 Bit 7
DB8 DB7
Bit 6 Bit 5 Bit 4
DB6 DB5 DB4
Bit 3
DB3
Bit 2 Bit 1
DB2 DB1
Bit 0
LSB
DB0
LSB
where,
DB11 - DB0—Data bits to be written to the DAC. The analog output of the DAC is updated when the value is written into the
register.
x = Don’t Care.
The DAC registers are cleared to all zeros (0x0000) upon power-up or reset. The DAC registers are read and write-enabled,
so that the registers can be read back to confirm the data.
AMC7820 SHUTDOWN REGISTER
The enable and disable functions of SW1 and SW2 are accomplished by writing a proper word into the SHUTDOWN register.
When enabled, SW1 connects to the output of DAC2, and SW2 connects to the output of OPA7. When disabled, SW1 connects
to analog ground, and SW2 connects to the output of SW3. The format of the SHUTDOWN register is as follows:
Bit 15
MSB
X
Bit 14
X
Bit 13 Bit 12 Bit 11
X
X
X
Bit 10 Bit 9
X
X
Bit 8 Bit 7
X
X
Bit 6
X
Bit 5
X
Bit 4
X
Bit 3
SW1-1
Bit 2 Bit 1
SW1-0 SW2-1
Bit 0
LSB
SW2-0
where,
SW1-0 - SW1-1—SW1 Disable Control Bits. For the operation of these two bits, see Table V.
SW2-0 - SW2-1—SW2 Disable Control Bits. For the operation of these two bits, see Table V.
x = Don’t Care.
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AMC7820
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