TNETE110PM Datasheet, PDF (23/26 Pages) Texas Instruments – PCI ETHERNETE CONTROLLER SINGLE-CHIP 10 BASE-T

ThunderLAN™ TNETE110PM
PCI ETHERNET™ CONTROLLER
SINGLE-CHIP 10 BASE-T
SPWS029 – SEPTEMBER 1996
timing requirements for crystal oscillator (see Figure 9)^†
MIN TYP MAX UNIT
td(VDDH _{– FXTL1V)}
Delay time from minimum VDD high level to first valid FXTL1V full swing period
(see Note 22)
100 ms
tw(H)
Pulse duration at FXTL1 high
13
ns
tw(L)
Pulse duration at FXTL1 low
13
ns
tt
Transition time of FXTL1
7
ns
tc
Cycle time, FXTL1
Tolerance of FXTL1 input frequency
50
ns
"0.01
%
† _{The FXTL signal may be implemented either by connecting a 20-MHz crystal across the FXTL1 and FXTL2 pins or by driving the FXTL1 from}
a 20-MHz crystal-oscillator module.
NOTE 22: This specification is provided as an aid to board design. This specification is not qualified during manufacturing testing.
VDD
FXTL1
Minimum VDD High Level
tc
td(VDDH _{– FXTL1V)}
tw(H)
tt
tt
tw(L)
Figure 9. Crystal-Oscillator Timing
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