TLC5930PWPR Datasheet, PDF (23/40 Pages) Texas Instruments – 12-CHANNEL LED DRIVER

TLC5930
PRINCIPLES OF OPERATION
SLLS528 – MARCH 2002
This packet allows DSG function, LKD function, dot correction function, brightness adjustment function, flag
setting for enable/disable to turn all the output on/off, and data setting for detection voltage set in the OVM
function.
DSG function (dual source gray scale clock)
The DSG function selects gray-scale clock from the input clock to GCLK terminal or internally-generated clock
using input to the DTIN/STIN terminals. By using the DSGSL flag in this packet, the signal used for the gray scale
clock is switched as below from next HSYNC packet. By using this function, the number of signal lines for gray
scale clock can be reduced, and display can be continued if DATA/STROBE lines are alive, even though the
gray scale clock has stopped due to any failures such as disconnection when using GCLK terminal.
The GEF/HEF function informs of any failures that may occur on the gray scale clock.
DSGSL=0: input clock to GCLK terminal (maximum operating frequency: 20 MHz)
DSGSL=1: internally generated clock using data input to DTIN/STIN terminals (maximum operating
frequency: 10 MHz)
LKD function
The LKD function supplies a constant-current of approximately 0.6 µA to the output terminal. When the power
supply voltage for the LED is 0 V (GND), writing a 1 to the LKDEN flag allows current flow through LED
subtracted leakage current of the device output transistor (below 0.1 µA) from 0.6 µA, and at this time the voltage
on output terminal decreases if the reverse leakage current occurs on LED. In this function, since maximum
applied voltage is 2.7 V, occurrence of reverse leakage current across LED can be found by reading the OVM
detection result through OVM information reading packet by setting the OVM detection voltage to 2/3 VCC. This
function should be used in combination with the FORCE OFF function to turn off all the constant-current outputs
off. The example for this function is shown in Table 9 below.
Table 9. LKD Function Sequence Example
1 Set LED power supply to 0 V (GND)
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{2 Set operation mode setting packet to force ON=0, force}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{OFF = 1 and LKDEN = 1}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ 3 Waitatleast1µs
4 Read OVM result through OVM information reading packet
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ _{5 Set operation mode setting paclet to force ON = 0, force}
ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ^{OFF = 0 and LKDEN = 0}
Set OVM detection voltage and force all outputs OFF and
LKD functions ON
Demand detection result
LKD function OFF and return to normal operation
DCEN/BCEN
By writing 0 to the flag, the corresponding data (plane brightness data or dot correction data) is set to 100%
default value. By writing 1 to the flag, corresponding data is complied with the value set by data setting packet.
When both DCEN and BCEN are 0, the current value will be 100% of the value set by R_IREF.
The function by flag setting becomes effective from next HSYNC packet after this packet, and in addition, when
both BCEN and DCEN flags are 1, the value set by respective data setting packets does not become effective
unless BCL and DCL flags in HSYNC packet are set to 1.
Setting both BCEN and DCEN flags to 0, doesn’t affect the latch flags in the HSYNC packet. This function writes
the default 1 to internal latch and the shift register is not updated. Therefore, unless the value for shift register
is updated in respective data setting packet, when plane brightness and dot correction functions are used next,
the previous status can be returned by latching the value of shift register into internal latch by setting BCL/DCL
flag in HSYNC packet after setting this packet.
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