THS3095_14 Datasheet, PDF (23/37 Pages) Texas Instruments – HIGH-VOLTAGE, LOW-DISTORTION, CURRENT-FEEDBACK OPERATIONAL AMPLIFIERS

THS3091
THS3095
www.ti.com........................................................................................................................................ SLOS423G – SEPTEMBER 2003 – REVISED OCTOBER 2008
PowerPAD™ DESIGN CONSIDERATIONS
The THS3091/5 are available in a
thermally-enhanced PowerPAD family of packages.
These packages are constructed using a downset
leadframe on which the die is mounted [see
Figure 71(a) and Figure 71(b)]. This arrangement
results in the lead frame being exposed as a thermal
pad on the underside of the package [see
Figure 71(c)]. Because this thermal pad has direct
thermal contact with the die, excellent thermal
performance can be achieved by providing a good
thermal path away from the thermal pad. Note that
devices such as the THS3091/5 have no electrical
connection between the PowerPAD and the die.
The PowerPAD package allows for both assembly
and thermal management in one manufacturing
operation. During the surface-mount solder operation
(when the leads are being soldered), the thermal pad
can also be soldered to a copper area underneath the
package. Through the use of thermal paths within this
copper area, heat can be conducted away from the
package into either a ground plane or other
heat-dissipating device.
The PowerPAD package represents a breakthrough
in combining the small area and ease of assembly of
surface mount with the, heretofore, awkward
mechanical methods of heatsinking.
DIE
Side View (a)
Thermal
Pad
DIE
End View (b)
Bottom View (c)
Figure 71. Views of Thermal Enhanced Package
Although there are many ways to properly heatsink
the PowerPAD package, the following steps illustrate
the recommended approach.
0.060
(1,52)
0.140
(3,56)
0.060
(1,52)
0.300
(7,62)
0.100
(2,54)
0.035
(0,89)
0.010
(0,254)
0.026
(0,66)
0.030
(0,732)
0.176
(4,47)
0.050
(1,27)
0.010
(0.254)
vias
0.035
(0,89)
0.080
(2,03)
All Units in inches (millimeters)
Figure 72. DDA PowerPAD PCB Etch and Via
Pattern
PowerPAD™ LAYOUT CONSIDERATIONS
1. PCB with a top-side etch pattern is shown in
Figure 72. There should be etch for the leads as
well as etch for the thermal pad.
2. Place 13 holes in the area of the thermal pad.
These holes should be 0.01 inch (0,254 mm) in
diameter. Keep them small so that solder wicking
through the holes is not a problem during reflow.
3. Additional vias may be placed anywhere along
the thermal plane outside of the thermal pad
area. This helps dissipate the heat generated by
the THS3091/5 IC. These additional vias may be
larger than the 0.01-inch (0,254 mm) diameter
vias directly under the thermal pad. They can be
larger because they are not in the thermal pad
area to be soldered so that wicking is not a
problem.
4. Connect all holes to the internal ground plane.
Note that the PowerPAD is electrically isolated
from the silicon and all leads. Connecting the
PowerPAD to any potential voltage such as V_S– is
acceptable as there is no electrical connection to
the silicon.
5. When connecting these holes to the ground
plane, do not use the typical web or spoke via
connection methodology. Web connections have
a high thermal resistance connection that is
useful for slowing the heat transfer during
soldering operations. This makes the soldering of
vias that have plane connections easier. In this
application, however, low thermal resistance is
desired for the most efficient heat transfer.
Therefore, the holes under the THS3091/5
PowerPAD package should make their
connection to the internal ground plane with a
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Product Folder Link(s): THS3091 THS3095