OPA2211-EP_16 Datasheet, PDF (23/32 Pages) Texas Instruments – Low-Power, Precision Operational Amplifier

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10.2 Layout Example
RIN
VIN
RG
+
±
RF
VOUT
(Schematic Representation)
OPA2211-EP
SBOS761 – NOVEMBER 2015
Place components close to
device and to each other to
reduce parasitic errors
VS+
Run the input traces as
far away from the supply
RF
lines as possible
RG
GND
RIN
VIN
OUT A
±IN A
+IN A
V±
V+
OUT B
±IN B
+IN B
GND
Use low-ESR, ceramic
bypass capacitor
Only needed for dual-
supply operation
GND
VS±
(or GND for single supply)
VOUT
Ground (GND) plane on another layer
Figure 46. Operational Amplifier Board Layout for Noninverting Configuration
10.3 Thermal Considerations
The primary issue with all semiconductor devices is junction temperature (T_J). The most obvious consideration is
assuring that T_J never exceeds the absolute maximum rating specified for the device. However, addressing
device thermal dissipation has benefits beyond protecting the device from damage. Even modest increases in
junction temperature can decrease operational amplifier performance, and temperature-related errors can
accumulate. Understanding the power generated by the device within the specific application and assessing the
thermal effects on the error tolerance lead to a better understanding of system performance and thermal
dissipation needs.
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