DP83848K_14 Datasheet, PDF (23/81 Pages) Texas Instruments – PHYTER Mini LS Industrial Temperature Single Port 10/100 Ethernet Transceiver

MDC
MDIO ^Z
Z
(STA)
MDIO
Z
Z
(PHY)
Z _{01 1 0 0 1 1 0 0 0 0 0 0 0}Z_{0 0 0 1 1 0 0 0 1 0 0 0 0 0 0 0 0} Z
Idle
Start
Opcode
(Read)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 4. Typical MDC/MDIO Read Operation
MDC
MDIO ^Z
Z
(STA)
Z_{0101011 00000001000000000000 00000} Z
Idle
Start
Opcode
(Write)
PHY Address
(PHYAD = 0Ch)
Register Address
(00h = BMCR)
TA
Register Data
Idle
Figure 5. Typical MDC/MDIO Write Operation
3.3.3 Serial Management Preamble Suppression
The DP83848K supports a Preamble Suppression mode
as indicated by a one in bit 6 of the Basic Mode Status
Register (BMSR, address 01h.) If the station management
entity (i.e. MAC or other management controller) deter-
mines that all PHYs in the system support Preamble Sup-
pression by returning a one in this bit, then the station
management entity need not generate preamble for each
management transaction.
The DP83848K requires a single initialization sequence of
32 bits of preamble following hardware/software reset.
This requirement is generally met by the mandatory pull-
up resistor on MDIO in conjunction with a continuous
MDC, or the management access made to determine
whether Preamble Suppression is supported.
While the DP83848K requires an initial preamble
sequence of 32 bits for management initialization, it does
not require a full 32-bit sequence between each subse-
quent transaction. A minimum of one idle bit between
management transactions is required as specified in the
IEEE 802.3u specification.
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