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TLC2810 Datasheet, PDF (22/23 Pages) Texas Instruments – LinCMOSE PRECISION DUAL OPERATIONAL AMPLIFIERS
TLC2810Z, TLC2810Y
LinCMOS™ PRECISION
DUAL OPERATIONAL AMPLIFIERS
SLOS120A – AUGUST 1993 – REVISED AUGUST 1994
APPLICATION INFORMATION
output characteristics
VDD
The output stage of the TLC2810Z is designed to
sink and source relatively high amounts of current
(see Typical Characteristics). If the output is
subjected to a short-circuit condition, this high-
current capability can cause device damage
under certain conditions. Output current capability
increases with supply voltage.
Although the TLC2810Z possesses excellent
high-level output voltage and current capability,
methods are available for boosting this capability
if needed. The simplest method involves the use
of a pullup resistor (RP) connected from the output
to the positive supply rail (see Figure 35). There
are two disadvantages to the use of this circuit.
First, the NMOS pulldown transistor, N4 (see
equivalent schematic), must sink a comparatively
large amount of current. In this circuit, N4 behaves
like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω,
depending on how hard the operational amplifier
input is driven. With very low values of RP , a
voltage offset from 0 V at the output occurs.
Secondly, pullup resistor RP acts as a drain load
to N4, and the gain of the operational amplifier is
reduced at output voltage levels where N5 is not
supplying the output current.
VI –
+
R2
R1
IP
RP
+ ) *) RP
VDD VO
IF IL IP
VO
IF
IP = Pullup Current
Required by the
Operational Amplifier
IL RL
(typically 500 µA)
Figure 35. Resistive Pullup to Increase VOH
2.5 V
–
VI
+
VO
CL
TA = 25°C
f = 1 kHz
VI(PP) = 1 V
– 2.5 V
Figure 36. Test Circuit for Output Characteristics
All operating characteristics of the TLC2810Z are measured using a 20-pF load. The devices can drive higher
capacitive loads; however, as output load capacitance increases, the resulting response pole occurs at lower
frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 37). In many cases, adding some
compensation in the form of a series resistor in the feedback loop alleviates the problem.
(a) CL = 20 pF, RL = NO LOAD
(b) CL = 130 pF, RL = NO LOAD
Figure 37. Effect of Capacitive Loads
(c) CL = 150 pF, RL = NO LOAD
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