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OPA2674_17 Datasheet, PDF (22/36 Pages) Texas Instruments – Dual Wideband, High Output Current Operational Amplifier with Current Limit
OPA2674
SBOS270C − AUGUST 2003 − REVISED AUGUST 2008
33.5Ω. This impedance is added in series with RG for cal-
culating the noise gainwhich gives NG = 3.98. This val-
ue, and the inverting input impedance of 22Ω, are inserted
into Equation 16 to get the RF that appears in Figure 12.
Note that the noninverting input in this bipolar supply in-
verting application is connected directly to ground.
It is often suggested that an additional resistor be con-
nected to ground on the noninverting input to achieve bias
current error cancellation at the output. The input bias cur-
rents for a current-feedback op amp are not generally
matched in either magnitude or polarity. Connecting a re-
sistor to ground on the noninverting input of the OPA2674
in the circuit of Figure 12 actually provides additional gain
for that input bias and noise currents, but does not de-
crease the output DC error because the input bias currents
are not matched.
OUTPUT CURRENT AND VOLTAGE
The OPA2674 provides output voltage and current capa-
bilities that are unsurpassed in a low-cost dual monolithic
op amp. Under no-load conditions at 25°C, the output volt-
age typically swings closer than 1V to either supply rail; the
tested (+25°C) swing limit is within 1.1V of either rail. Into
a 6Ω load (the minimum tested load), it delivers more than
±380mA.
The specifications described previously, though familiar in
the industry, consider voltage and current limits separately.
In many applications, it is the voltage times current (or V−I
product) that is more relevant to circuit operation. Refer to
the Output Voltage and Current Limitations plot in the Typi-
cal Characteristics (see page 9). The X and Y axes of this
graph show the zero-voltage output current limit and the
zero-current output voltage limit, respectively. The four
quadrants give a more detailed view of the OPA2674 out-
put drive capabilities, noting that the graph is bounded by
a safe operating area of 1W maximum internal power dis-
sipation (in this case, for one channel only). Superimpos-
ing resistor load lines onto the plot shows that the
OPA2674 can drive ±4V into 10Ω or ±4.5V into 25Ω with-
out exceeding the output capabilities or the 1W dissipation
limit. A 100Ω load line (the standard test circuit load)
shows the full ±5.0V output swing capability, as stated in
the Electrical Characteristics tables. The minimum speci-
fied output voltage and current over temperature are set by
worst-case simulations at the cold temperature extreme.
Only at cold startup will the output current and voltage de-
crease to the numbers shown in the Electrical Characteris-
tics tables. As the output transistors deliver power, the
junction temperatures increase, decreasing the VBEs (in-
creasing the available output voltage swing), and increas-
ing the current gains (increasing the available output cur-
rent). In steady-state operation, the available output
voltage and current will always be greater than that shown
in the over-temperature specifications since the output
stage junction temperatures will be higher than the mini-
mum specified operating ambient.
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DRIVING CAPACITIVE LOADS
One of the most demanding and yet very common load
conditions for an op amp is capacitive loading. Often, the
capacitive load is the input of an analog-to-digital (A/D)
converterincluding additional external capacitance that
may be recommended to improve the A/D converter linear-
ity. A high-speed, high open-loop gain amplifier like the
OPA2674 can be very susceptible to decreased stability
and closed-loop response peaking when a capacitive load
is placed directly on the output pin. When the amplifier
open-loop output resistance is considered, this capacitive
load introduces an additional pole in the signal path that
can decrease the phase margin. Several external solu-
tions to this problem have been suggested.
When the primary considerations are frequency response
flatness, pulse response fidelity, and/or distortion, the sim-
plest and most effective solution is to isolate the capacitive
load from the feedback loop by inserting a series isolation
resistor between the amplifier output and the capacitive
load. This does not eliminate the pole from the loop re-
sponse, but rather shifts it and adds a zero at a higher fre-
quency. The additional zero acts to cancel the phase lag
from the capacitive load pole, thus increasing the phase
margin and improving stability. The Typical Characteristics
show the Recommended RS vs Capacitive Load and the
resulting frequency response at the load. Parasitic capaci-
tive loads greater than 2pF can begin to degrade the per-
formance of the OPA2674. Long PC board traces, un-
matched cables, and connections to multiple devices can
easily cause this value to be exceeded. Always consider
this effect carefully, and add the recommended series re-
sistor as close as possible to the OPA2674 output pin (see
the Board Layout Guidelines section).
DISTORTION PERFORMANCE
The OPA2674 provides good distortion performance into
a 100Ω load on ±6V supplies. It also provides exceptional
performance into lighter loads and/or operating on a single
+5V supply. Generally, until the fundamental signal reach-
es very high frequency or power levels, the 2nd-harmonic
dominates the distortion with a negligible 3rd-harmonic
component. Focusing then on the 2nd-harmonic, increas-
ing the load impedance improves distortion directly. Re-
member that the total load includes the feedback net-
workin the noninverting configuration (see Figure 1),
this is the sum of RF + RG; in the inverting configuration,
it is RF. Also, providing an additional supply decoupling ca-
pacitor (0.01µF) between the supply pins (for bipolar op-
eration) improves the 2nd-order distortion slightly (3dB to
6dB).
In most op amps, increasing the output voltage swing di-
rectly increases harmonic distortion. The Typical Charac-
teristics show the 2nd-harmonic increasing at a little less
than the expected 2x rate, whereas the 3rd-harmonic in-
creases at a little less than the expected 3x rate. Where the
test power doubles, the difference between it and the