OPA2211-EP Datasheet, PDF (22/32 Pages) Texas Instruments – OPA2211-EP 1.1-nV/√Hz Noise, Low-Power, Precision Operational Amplifier

OPA2211-EP
SBOS761 – NOVEMBER 2015
9 Power Supply Recommendations
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9.1 Operating Voltage
OPA2211-EP series operational amplifiers operate from ±2.25-V to ±18-V supplies while maintaining excellent
performance. The OPA2211-EP series can operate with as little as +4.5 V between the supplies and with up to
+36 V between the supplies. However, some applications do not require equal positive and negative output
voltage swing. With the OPA2211-EP series, power-supply voltages do not need to be equal. For example, the
positive supply could be set to +25 V with the negative supply at –5 V or vice-versa.
The common-mode voltage must be maintained within the specified range. In addition, key parameters are
assured over the specified temperature range, T_A = –55°C to 125°C. Parameters that vary significantly with
operating voltage or temperature are shown in Typical Characteristics.
10 Layout
10.1 Layout Guidelines
For best operational performance of the device, use good PCB layout practices, including:
• Noise can propagate into analog circuitry through the power pins of the circuit as a whole and op amp itself.
Bypass capacitors are used to reduce the coupled noise by providing low-impedance power sources local to
the analog circuitry.
– Connect low-ESR, 0.1-μF ceramic bypass capacitors between each supply pin and ground, placed as
close to the device as possible. A single bypass capacitor from V+ to ground is applicable for single
supply applications.
• Separate grounding for analog and digital portions of circuitry is one of the simplest and most-effective
methods of noise suppression. One or more layers on multilayer PCBs are usually devoted to ground planes.
A ground plane helps distribute heat and reduces EMI noise pickup. Make sure to physically separate digital
and analog grounds paying attention to the flow of the ground current. For more detailed information refer to
Circuit Board Layout Techniques, SLOA089.
• In order to reduce parasitic coupling, run the input traces as far away from the supply or output traces as
possible. If these traces cannot be kept separate, crossing the sensitive trace perpendicular is much better as
opposed to in parallel with the noisy trace.
• Place the external components as close to the device as possible. As shown in Figure 46, keeping RF and
RG close to the inverting input minimizes parasitic capacitance.
• Keep the length of input traces as short as possible. Always remember that the input traces are the most
sensitive part of the circuit.
• Consider a driven, low-impedance guard ring around the critical traces. A guard ring can significantly reduce
leakage currents from nearby traces that are at different potentials.
• Cleaning the PCB following board assembly is recommended for best performance.
• Any precision integrated circuit may experience performance shifts due to moisture ingress into the plastic
package. Following any aqueous PCB cleaning process, TI recommends baking the PCB assembly to
remove moisture introduced into the device packaging during the cleaning process. A low temperature, post
cleaning bake at 85°C for 30 minutes is sufficient for most circumstances.
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