LP8758-B0 Datasheet, PDF (22/56 Pages) Texas Instruments – LP8758-B0 Four-Phase DC-DC Step-Down Converter

LP8758-B0
SNVSA06B – MARCH 2015 – REVISED MAY 2016
Voltage
BUCK0_VSET
Current
ILIMx
Regulator disabled
by digital
New startup if
enable is valid
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350mV
Resistive
1ms
pull-down
Time
INT_BUCKx.BUCKx_ILIM_INT ⁰
25Ps
1
Time
0
INT_BUCK_0_1.BUCK0_SC_INT ⁰
1
0
BUCK_0_1_STAT.BUCK0_STAT ¹
0
1
nINT
Host clearing the interrupt by writing to flags
Figure 13. Overload Situation
8.3.5.1.2 Thermal Warning
The LP8758 device includes protection feature against over-temperature by setting an interrupt for host
processor. The threshold level of the thermal warning is selected with CONFIG.TDIE_WARN_LEVEL bit.
If the LP8758 device temperature increases above thermal warning level the device sets INT_TOP.TDIE_WARN
bit and pulls nINT pin low. The status of the thermal warning can be read from TOP_STAT.TDIE_WARN_STAT
bit and the interrupt is cleared by writing 1 to INT_TOP.TDIE_WARN bit.
8.3.5.2 Protection (Regulator Disable)
If the regulator is disabled because of protection or fault (short-circuit protection, overload protection, thermal
shutdown, or undervoltage lockout), the output power FETs are set to high-impedance mode, and the output pull-
down resistor is enabled (if enabled with BUCKx_CTRL1.EN_RDISx bits). The turn-off time of the output voltage
is defined by the output capacitance, load current, and the resistance of the integrated pulldown resistor.
8.3.5.2.1 Short-Circuit and Overload Protection
A short-circuit protection feature allows the LP8758 to protect itself and external components against short circuit
at the output or against overload during start-up. The fault threshold is 350 mV, and the protection is triggered,
and the regulator disabled, if the output voltage is below the threshold level 1 ms after the regulator is enabled.
In a similar way the overload situation is protected during normal operation. If the regulator's feedback-pin
voltage falls below 0.35 V, and remains below the threshold level for 1 ms, the regulator is disabled.
In the short-circuit and overload situations the INT_BUCK_0_1.BUCK0_SC_INT and the INT_TOP.INT_BUCK0
bits are set to 1, the BUCK_0_1_STAT.BUCK0_STAT bit is set to 0 and the nINT signal is pulled low. The host
processor clears the interrupt by writing 1 to the INT_BUCK_0_1.BUCK0_SC_INT bit. Upon clearing the interrupt
the regulator makes a new start-up attempt if the enable register bits and/or ENx control signal is valid.
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