LMH6612MA Datasheet, PDF (22/32 Pages) Texas Instruments – Single Supply 345 MHz Rail-to-Rail Output Amplifiers

R_F = R_G
665
1000
f −3 dB (MHz)
110
113
Peaking (dB)
0
0.6
MINIMIZING NOISE
With a low input voltage noise of 10 nV/ and an input cur-
rent noise of 2 pA the LMH6611 and LMH6612 are suit-
able for high accuracy applications. Still being able to reduce
the frequency band of operation of the various noise sources
(i.e. op amp noise voltage, resistor thermal noise, input noise
current) can further improve the noise performance of a sys-
tem. In a non-inverting amplifier configuration inserting a
capacitor, C_G, in series with the gain setting resistor, R_G, will
reduce the gain of the circuit below frequency, f =
1/2πR_GC_G. This can be set to reduce the contribution of noise
from the 1/f region. Alternatively applying a feedback capac-
itor, C_F, in parallel with the feedback resistor, R_F, will introduce
a pole into your system at f = 1/2πR_FC_F and create a low pass
filter. This filter can be set to reduce high frequency noise and
harmonics. Finally remember to keep resistor values as small
as possible for a given application in order to reduce resistor
thermal noise.
POWER SUPPLY BYPASS
Since the LMH6611 and LMH6612 are wide bandwidth am-
plifiers, proper power supply bypassing is critical for optimum
performance. Improper power supply bypassing can result in
large overshoot, ringing or oscillation. 0.1 μF capacitors
should be connected from the supply pins, V⁺ and V^−, to
ground, as close to the device as is practical. Additionally, a
10 μF electrolytic capacitor should be connected from both
supply pins to ground reasonably close to the device. Finally,
near the device a 0.1 μF ceramic capacitor between the sup-
plies will provide the best harmonic distortion performance.
INTERFACING HIGH PERFORMANCE OP AMPS WITH
ADCs
These amplifiers are designed for ease of use in a wide range
of applications requiring high speed, low supply current, low
noise, and the ability to drive complex ADC and video loads.
The source that drives the modern high resolution analog-to-
digital converters (ADCs) sees a high frequency AC load and
a DC load of a few hundred ohms or more. Thus, a high per-
formance op amp with high input impedance of a few mega
ohms and low output impedance would be an ideal choice as
an input ADC driver. The LMH6611/LMH6612 have the low
output impedance of 0.07Ω at f = 1 MHz. The ADC driver acts
as a buffer and a low pass filter to reduce the overall system
noise. To utilize the full dynamic range of the ADC, the ADC
input has to be driven to full scale input voltage.
As signals travel through the traces of a printed circuit board
(PCB) and long cables, system noise accumulates in the sig-
nals and a differential ADC rejects any signals noise that
appears as a common mode voltage. There are a couple of
advantages to using differential signals rather than single-
ended signals. First, differential signals double the dynamic
range of the ADC and second, they offer better harmonic dis-
tortion performance. There are several ways to produce dif-
ferential signals from a dual op amp configuration. One
method is to utilize the single-ended to differential conversion
technique and the other is the differential to differential con-
version technique. The first method requires a single input
source and the second method requires differential input
source.
A real world input source can have non-ideal impedance thus
the buffer amplifier, with very low output impedance, is re-
quired to drive the input of the ADC. To minimize the droop in
the input voltage, external shunt capacitance (C_L) should be
about ten times larger than the internal input capacitance of
the ADC and external series resistance (R_L) should be large
enough to maintain the phase delay at the output of the op
amp and hence maintain the stability (See Figure 4) . Most
applications benefit from the inclusion of a series isolation re-
sistor connected between the op amp output and ADC input.
This series resistor helps to limit the output current of the op
amp. The value chosen for this series resistor is very impor-
tant, as a higher value will increase the load impedance seen
by the op amp and improve the total harmonic distortion
(THD) performance of the op amp; however, the ADC prefers
a low impedance source driving it. Thus, the optimum value
for this series resistor must be found so that it will offer the
best performance in terms of THD, SNR and SFDR of the
combined op amp and ADC.
Important Specifications of Op Amp and ADC
When interfacing an ADC with an op amp it is imperative to
understand the specifications that are important to get the
expected performance results. Modern ADC AC specifica-
tions such as THD, SNR, settling time and SFDR are critical
for filtering, test and measurement, video and reconstruction
applications. The high performance op amp’s settling time,
THD, and noise performance must be better than that of the
ADC it is driving to maintain the proper system accuracy with
minimal or no error.
Some system applications require low THD, low SFDR and
wide dynamic range (SNR), whereas some system applica-
tions require high SNR and they may sacrifice THD and SFDR
to focus on the noise performance.
Noise is a very important specification for both the op amp
and the ADC. There are three main sources of noise that
contribute to the overall performance of the ADC: Quantiza-
tion noise, noise generated by the ADC itself (particularly at
higher frequencies) and the noise generated by the applica-
tion circuit. The impedance of the input source affects the
noise performance of the op amp. Theoretically, an ADC’s
signal to noise ratio (SNR) can be found from the equation:
SNR (in dB) = 6.02*N+1.72
where N is the resolution of the ADC. For example, according
to this equation a 12-bit ADC has an SNR of 74 dB. However,
the practical SNR number would be about 72 dB. In order to
achieve better SNR, the ADC driver noise should be as small
as possible. The LMH6611/LMH6612 have the low voltage
noise of only 10 nV/ .
The combined settling time of the op amp and the ADC must
be within 1 LSB. The 0.01% settling time of the LMH6611/
LMH6612 is 100 ns.
The ADC driver’s THD should be inherently lower than that of
the ADC. The LMH6611/LMH6612 have an SFDR of 96 dBc
at 2 V_PP output and 1 MHz input frequency.
Signal to Noise and Distortion (SINAD) is a parameter which
is the combination of the SNR and THD specifications. SINAD
is defined as the RMS value of the output signal to the RMS
value of all of the other spectral components below half the
clock frequency, including harmonics but excluding DC. It can
be calculated from SNR and THD according to the equation:
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