DP83867IR_16 Datasheet, PDF (22/132 Pages) Texas Instruments – DP83867IR/CR Robust, High Immunity 10/100/1000 Ethernet Physical Layer Transceiver

DP83867IR, DP83867CR
SNLS484D – FEBRUARY 2015 – REVISED JULY 2016
7.11
T1
T2
T3
T4
GMII Receive Timing⁽¹⁾
PARAMETER
Rising edge of RX_CLK to RXD,
RX_DV, and RX_ER delay
RX_CLK Duty Cycle
RX_CLK Rise / Fall Time
MDI to GMII Latency
TEST CONDITIONS
See ⁽²⁾
(1) Ensured by production test, characterization, or design.
(2) Operating in 1000Base-T.
tT2t
T3
RX_CLK
RXD [7:0]
RX_DV
RX_ER
tT1t
tT4t
Valid Data
MDI
Start of Frame
MIN
0.5
40
T3
Figure 7. GMII Receive Timing
NOM
264
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MAX UNIT
5.5 ^ns
60 %
1 ns
ns
22
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