BQ77904 Datasheet, PDF (22/45 Pages) Texas Instruments – Open Wire Stackable Lithium-ion Battery Protector

bq77904, bq77905
SLUSCM3A – JUNE 2016 – REVISED JUNE 2016
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V_CTR2
V_CTRDIS (max)
VDD
ENABLED
DISABLED
(FET OFF)
V_CTRDIS (min)
V_CTR1
ENABLED
VSS
CHG driver set by CTRC
DSG driver set by CTRD
Figure 16. External Override of CHG and DSG Drivers
8.3.10 Configuring 3S, 4S, or 5S Mode
The bq77904 supports 3S and 4S packs, while the bq77905 supports 3S, 4S, and 5S packs. In order to avoid
accidentally detecting a UV fault on unused (shorted) cell inputs, the device must be configured for the specific
cell count of the pack. This is set with the configuration pin, CCFG, which is mapped as in Table 7. The device
periodically checks the CCFG status and takes t_{CCFG_DEG} time to detect the pin status.
CCFG
< V_CCFGL for t_{CCFG_DEG}
Within V_CCFGM for t_{CCFG_DEG}
> V_CCFGH for t_{CCFG_DEG}
Table 7. CCFG Configurations
CONFIGURATION
3 cells
4 cells
5 cells
CONNECT TO
AVSS
AVDD
Floating
The CCFG pin should be tied to the recommended net from Table 7. The device compares the CCFG input
voltage to the AVDD voltage and should never be set above the AVDD voltage. When the device configuration is
for 5S, leave the CCFG pin floating. The internal pin bias is approximately 30% of the AVDD voltage for 5S
configuration. Note that the bq77904 should be configured in 5S mode as this results in a permanent UV fault.
8.3.11 Stacking Implementations
Higher than 5S cell packs may be supported by daisy-chaining multiple devices. Each device will ensure OV, UV,
OTC OTD, UTC, and UTD protections, of its directly monitored cells, while any fault conditions automatically
disable the global CHG and/or DSG FET driver. Note that upper devices do not provide OCD1, OCD2, or SCD
protections, as these are based on pack current. For bq77904 and bq77905 used on the upper stack, the SRP
and SRN pins should be shorted to prevent false detection.
Table 8. Stacking Implementation Configurations
CONFIGURATION
Bottom or single device
Upper stack
CHG PIN
Connect to CHG FET
Leave unconnected
CHGU PIN
Leave unconnected
Connect to CTRC of the lower device
To configure higher-cell packs, follow this procedure:
• Each device must have a connection on at least three lowest-cell input pins.
• It is recommended to connect higher-cell count to the upper devices (for example, for a 7S configuration,
connect 4 cells on the upper device and 3 cells on the bottom device). This is to provide stronger CRTx signal
to the bottom device.
• Ensure that each device’s CCFG pin is configured appropriately for its specific number of cells (three, four, or
five cells).
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