VCA2615PFBR Datasheet, PDF (21/33 Pages) Texas Instruments – Dual, Low-Noise

VCA2615
www.ti.com
VARIABLE GAIN CHARACTERISTICS
Transistors Q10, Q12, Q14, Q16, Q18, Q20, Q22, and Q24
form a variable resistor network that is programmed in an
exponential manner to control the gain. Transistors Q11,
Q13, Q15, Q17, Q19, Q21, Q23, and Q25 perform the
same function. These two groups of FET variable resistors
are configured in this manner to balance the capacitive
loading on the total variable-resistor network. This
balanced configuration is used to keep the second
harmonic component of the distortion low. The common
source connection associated with each group of FET
variable resistors is brought out to an external pin so that
an external capacitor can be used to make an AC
connection. This connection is necessary to achieve an
adequate low-frequency bandwidth because the coupling
capacitor would be too large to include within the
monolithic chip. The value of this variable resistor ranges
in value from 15Ω to 5000Ω to achieve a gain range of
about 44dB. The low-frequency bandwidth is then given by
the formula:
Low Frequency BW + 1ń2pRC
(7)
where:
R is the value of the attenuator.
C is the value of the external coupling capacitor.
For example, if a low-frequency bandwidth of 500kHz was
desired and the value of R was 15Ω, then the value of the
coupling capacitor would be approximately 22nF.
One of the benefits of this method of gain control is that the
output offset is independent of the variable gain of the
output amplifier. The DC gain of the output amplifier is
extremely low; any change in the input voltage is blocked
by the coupling capacitor, and no signal current flows
through the variable resistor. This method also means that
any offset voltage existing in the input is stored across this
coupling capacitor; when the resistor value is changed, the
DC output will not change. Therefore, changes in the
control voltage do not appear in the output signal.
Figure 64 shows the output waveform resulting from a step
change in the control voltage, and Figure 65 shows the
output voltage resulting when the control voltage is a
full-scale ramp.
SBOS316D − JULY 2005 − REVISED OCTOBER 2008
Channel 1
V_CNTL
(2V/div)
Channel 2
Output
(20mV/div)
Time (400ns/div)
Figure 64. Response to Step Change of V_CNTL
Channel 1
V_CNTL
(2V/div)
Channel 2
Output
(20mV/div)
Time (400ns/div)
Figure 65. Response to Ramp Change of V_CNTL
The exponential gain control characteristic is achieved
through a piecewise approximation to a perfectly smooth
exponential curve. Eight FETs, operated as variable
resistors whose value is progressively 1/2 of the value of
the adjacent parallel FET, are turned on progressively, or
their value is lowered to create the exponential gain
characteristic. This characteristic can be shown in the
following way. An exponential such as y = e^x increases in
the y dimension by a constant ratio as the x dimension
increases by a constant linear amount. In other words, for
a constant (x1 − x2), the ratio e^x1/e^x2 remains the same.
When FETs used as variable resistors are placed in
parallel, the attenuation characteristic that is created
behaves according to this same exponential characteristic
at discrete points as a function of the control voltage.
It does not perfectly obey an ideal exponential
characteristic at other points; however, an 8-section
approximation yields a ±1dB error to an ideal curve.
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