TPS92660 Datasheet, PDF (21/29 Pages) Texas Instruments – Two-String LED Driver with IC OTP ROM Current Trim

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TPS92660
SLUSBC2 – APRIL 2013
1
STRIM[5:0]
must be valid
LTRIM[3:0]
EVDD
must be valid
8V
5V
2
4
OTP 00h
ROM[7:0]
04h
>25 ms
3
00h
UDG-12213
Figure 26. OTP ROM Programming Sequence
OTP ROM Reading
The EPROM is read under either of the following conditions:
• Power-on reset. Note that power-on reset starts when both EN pin and VCC voltages cross the UVLO
threshold. It takes apprimately 50µs to read the OTP ROM contents into the TRIM registers.
• Writing a ‘1’ to the READ bit of the OTP ROM register. It is not necessary to clear the READ bit after writing it
to a ‘1’.
The device temporarily enables the 500-kHz oscillator during the OTP ROM read cycle. This operation is
necessary because the digital counters generate the timing for the OTP ROM read cycle. After the OTP ROM
read cycle is finished, the oscillator is disabled.
Figure 27 shows a power-on OTP ROM read cycle. The device reads all OTP ROM registers simultaneously. All
timing values are approximate and based on a 500-kHz internal oscillator.
POR
50 ms
STRIM [5:0]
valid
LTRIM [3:0]
valid
UDG-12212
Figure 27. Power-ON OTP ROM Read Timing
Reference Voltage
The TPS92660 provides a 3.0V reference voltage which can be used in the AC/DC main power supply
secondary-side control circuit.
Thermal Shutdown
Internal thermal shutdown circuitry protects the device in the event that the maximum junction temperature is
exceeded. The threshold for thermal shutdown is 165°C with a 25°C hysteresis. Thermal shutdown protection
disables the MOSFET drivers.
Copyright © 2013, Texas Instruments Incorporated
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