TPS54290_12 Datasheet, PDF (21/35 Pages) Texas Instruments – 1.5-A/2.5-A Dual, Fully-Synchronous Buck Converter With Integrated MOSFET

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TPS54290, TPS54291, TPS54292
SLUS973 – OCTOBER 2009
The list of materials for this application is shown below in Table 2. The efficiency, line regulation and load
regulation from printed circuit boards built using this design are shown in Figure 23 and Figure 24.
Figure 21. TPS54291 Design Example 1 Schematic
Step by Step Design Procedure
Duty Cycle Estimation
The duty cycle of the main switching FET is estimated by Equation 16 and Equation 17.
D_MAX1
»
V_OUT
V_{IN(m in )}
=
3.3
8.0
=
0.413 ¾¾® D_MAX2
»
V_OUT
V_{IN(m in )}
=
1.2
8.0
= 0.15
(16)
D_MIN1
»
V_OUT
V_{IN(max )}
=
3.3
14
=
0.236 ¾¾®D_MIN2
»
V_OUT
V_{IN(max )}
=
1.2
14
=
0.086
(17)
Inductor Selection
The peak to peak ripple should be limited to between 20% and 30% of the maximum output current.
I_Lrip1(max) = 0.30 ´ I_OUT(max) = 0.3 ´1.5 A = 0.450 A
(18)
I_Lrip2(max) = 0.30 ´ I_OUT(max) = 0.3 ´ 2.5 A = 0.750 A
(19)
The minimum inductor size can be estimated by Equation 20 and Equation 21.
L_MIN1 »
V_IN(max) - V_OUT
I_{LRIP(max )}
´ D_MIN
´
1
f_SW
= ^{14 - 3.3} ´ 0.236 ´ ¹ = 9.35 mH
0.45 A
600 kHz
(20)
L_MIN2 »
V_{IN(max )} - V_OUT
I_{LRIP(max )}
´ D_MIN
´
1
f_SW
= ^{14 - 1.2} ´ 0.086 ´ ¹ = 2.45 mH
0.75 A
600 kHz
(21)
The standard inductor values of 8.2 µH and 3.3 µH are selected for Channel 1 and Channel 2 respectively. The
actual ripple currents are estimated by Equation 22 and Equation 23.
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