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TPS5130-Q1 Datasheet, PDF (21/31 Pages) Texas Instruments – TRIPLE SYNCHRONOUS BUCK CONTROLLER WITH NMOS LDO CONTROLLER
TPS5130-Q1
www.ti.com................................................................................................................................................................................................... SLVS866 – MARCH 2009
Soft Start
The soft start timing can be adjusted by selecting the soft-start capacitor value (see Equation 10).
C(soft) + 2.3
10*6
t(soft)
0.85
(10)
where
C(soft) is the soft-start capacitor (µF) (C05, C07, and C10 in EVM design)
t(soft) is the start-up time (seconds)
For example
If t(soft) = 5 ms
Then, C(soft) = 0.0135 µF
Current Protection
The current limit in TPS5130 is set using an internal current source and an external resistor (R17, R23, and
R24). The current limit protection circuit compares the drain to source voltage of the high-side and low-side
MOSFET(s) with respect to the set-point voltage. If the voltage up exceeds the limit during high-side conduction,
the current limit circuit terminates the high-side driver pulse. If the set point voltage is exceeded during low-side
conduction, the low side pulse is extended through the next cycle. Together this action has the effect of
decreasing the output voltage until the under voltage protection circuit is activated and the fault latch is set and
both the high-side and low-side MOSFET drivers are shut off. Equation 11 should be used for calculating the
external resistor value for current protection set point.
r DS(on)
ǒ Ǔ I(trip)
)
I (ripple)
2
R(cl) +
13 10–6
(11)
where
R(cl) is the external current limit resistor (R17, R23 and R24)
rDS(on) is the low-side MOSFET(Q02, Q04, and Q06) on-time resistance
I(trip) is the required current limit
For example
If rDS(on) = 25 mΩ, I(trip) = 4 A, I(ripple) = 1.57 A
Then, R(cl)= 9.2 kΩ
It should be noted that rDS(on) of a FET is highly dependent on temperature, so to ensure full output at maximum
operating temperature, the value of rDS(on) in Equation 11 should be adjusted. For maximum stability, it is
recommended that the high-side MOSFET(s) has the same, or slightly higher rDS(on) than the low-side
MOSFET(s). If the low-side MOSFET(s) has a higher rDS(on), in certain low duty cycle applications it may be
possible for the device to regulate at an output current higher than that set by Equation 11 by increasing the
high-side conduction time to compensate for the missed conduction cycle caused by the extension of the
previous low-side pulse.
Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TPS5130-Q1
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