TLC5973D Datasheet, PDF (21/27 Pages) Texas Instruments – 3-Channel, 12-Bit, PWM Constant-Current LED Driver

TLC5973
www.ti.com
SBVS225A – MARCH 2013 – REVISED MAY 2013
HOW TO CONTROL DEVICES CONNECTED IN SERIES
The 12-bit write command and 36-bit grayscale (GS) data for OUT0 to OUT2 (for a total of 48 bits of data) must
be written to the device.Figure 22 shows the 48-bit data packet configuration. When multiple devices are
cascaded (as shown in Figure 23), N times the packet must be written into each TLC5973 in order to control all
devices. There is no limit on how many devices can be cascaded, as long as proper VCC voltage is supplied.
The packet for all devices must be written again whenever any GS data changes.
MSB
Data 0 Data 0
for t_CYCLE for t_CYCLE
Data
1
Data
1
Data
1
Data
0
Data
101
Data
1
Data
0
Data
0 or 1
Data
0 or 1
Data
0 or 1
Data
0 or 1
Data
0 or 1
LSB
Data
0 or 1
Bit 11
Write Command Data, 12 Bits
(3AAh = 001110101010b)
Bit 0
Bit 11 _OUT0
Bit 0
GS Data, 12 Bits
Bit 11 _OUT1
Bit 0
GS Data, 12 Bits
Bit 11 _OUT2 Bit 0
GS Data, 12 Bits
Figure 22. 48-Bit Data Packet Configuration for One TLC5973
V_LED
5.0 V
R_VCC
VCC
Controller
CLK
GND
C_VCC
0.1 µF
GND
R_VCC
1st Device
VCC
SDI
SDO
IREF
GND
GND
R_VCC
2nd Device
VCC
SDI
SDO
IREF
GND
GND
R_VCC
N-1st Device
VCC
SDI
SDO
IREF
GND
GND
Nth Device
VCC
SDI
SDO
IREF
GND
GND
Figure 23. Cascade Connection of N TLC5973 Units (Internal Shunt Regulator Mode)
Refer to Figure 24 for the 48-bit data packet, EOS, and GSLAT input timing of all devices. The function setting
write procedure and display control is as follows:
1. Power-up VCC (V_LED); all OUTn are off because GS data are not written yet.
2. Write the 48-bit data packet (MSB-first) for the first device using t_CYCLE and the data write sequences
illustrated in Figure 18 and Figure 19. The first 12 bits of the 48-bit data packet are used as the write
command. The write command must be 3AAh (001110101010b); otherwise, the 36-bit GS data in the 48-bit
shift register are not copied to the 36-bit GS data latch.
3. Execute one communication cycle EOS (refer to Figure 20) for the first device.
4. Write the 48-bit data packet for the second TLC5973 as described step 2. However, t_CYCLE should be set to
the same timing as the first device.
5. Execute one communication cycle EOS for the second device.
6. Repeat steps 4 and 5 until all devices have GS data.
7. The number of total bits is 48 × N. After all data are written, execute a GSLAT sequence as described in
Figure 21 in order to copy the 36-bit LSBs in the 48-bit shift resister to the 36-bit GS data latch in each
device; PWM control starts with the written GS data at the same time.
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