OPA685 Datasheet, PDF (21/32 Pages) Burr-Brown (TI) – Ultra-Wideband, Current-Feedback OPERATIONAL AMPLIFIER With Disable TM

For a 20mA peak output current DAC, the mid-scale current
of 10mA will give a 2V DC output common-mode operating
voltage due to the 200Ω resistor to ground at their outputs. The
total AC impedance at each output is 50Ω, giving a ±0.5V
swing around this 2V common-mode voltage for the DAC.
These resistors also act as a current divider sending 75% of the
DAC output current through the feedback resistor (464Ω). The
blocking capacitor references the OPA685 output voltage to
ground, and turns the unipolar DAC output current into a
bipolar swing of 0.75 • 20mA • 464Ω = 7Vp-p at each
amplifier output. Each output is exactly 180° out-of-phase
from the other, producing double 7Vp-p into the matching
resistors. To limit the peak output current and improve distor-
tion, the circuit of Figure 10 is set up with a 1.4:1 step-down
transformer. This reflects the 50Ω load to be 100Ω at the
primary side of the transformer. For the maximum 14Vp-p
swing across the outputs of the two amplifiers, the matching
resistors will drop this to 7Vp-p at the input of the transformer,
then down to 5Vp-p maximum at the 50Ω load at the output
of the transformer.
HIGH-SPEED ADC INPUT DRIVERS
The OPA685 is ideally suited to the demanding input drive
requirements of emerging ultra high-speed and high perfor-
mance ADCs. As a single amplifier stage, 10-bit converters
through 100MSPS may be driven, while 8-bit converters
may be driven with input frequencies in excess of 100MHz.
Emerging differential input ADCs can also benefit from a
purely differential input interface using two OPA685s to get
a significant improvement in even-order harmonics along
with a somewhat improved 3rd-order harmonic suppression.
SINGLE-ENDED ADC INPUT INTERFACE
Figure 11 shows an example single +5V supply ADC driver
where the AC gain is set to –8V/V. The converter is shown
with both an inverting and non-inverting input. The inverting
input is used here to make the overall channel non-inverting.
The Typical Performance Curves for the non-inverting gain
of +8 show very flat frequency response for +5V only
operation when driving into the 20pF load capacitor shown in
Figure 11. The inverting configuration of Figure 11 was
selected for higher slew rate and lower distortion perfor-
mance. It will give > 300MHz bandwidth at this gain of –8.
Harmonic distortion for a 2Vp-p output signal will be < –
50dBc through 50MHz.
DIFFERENTIAL ADC DRIVER
For applications requiring the lowest harmonic distortion
through very high frequencies, a balanced differential cir-
cuit using the OPA685 offers the best performance. Figure
12 shows an example of this approach where an input step-
up transformer is used to convert to a differential signal and
improve the Noise Figure.
+5V
Power supply decoupling
not shown.
V_O = 2.5V_DC – 8V_I
+5V
2kΩ
20Ω
DIS
42.2Ω
ADC
0.1µF
2kΩ
OPA685
IN
20pF
IN
50Ω
400Ω
V_I
CM
FIGURE 11. Single Supply, Wideband ADC Driver.
+5V
DIS
V_CM
OPA685
Power supply decoupling
not shown.
50Ω Source
V_I
1:2
Noise
Figure
11.8dB
100Ω
100Ω
–5V
600Ω
600Ω
+5V
DIS
43.2Ω
43.2Ω
22pF
V_O ADC Input
22pF
OPA685
V_CM
–5V
V_{O = 12V/V (21.6dB)}
V_I
FIGURE 12. Very Wideband Differential ADC Driver.
21
®
OPA685