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OPA211-HT Datasheet, PDF (21/26 Pages) Texas Instruments – 1.1 nV/√Hz Noise, Low Power, Precision Operational Amplifier
OPA211-HT
www.ti.com
Figure 47 depicts a specific example where the input
voltage, VIN, exceeds the positive supply voltage
(+VS) by 500 mV or more. Much of what happens in
the circuit depends on the supply characteristics. If VS
can sink the current, one of the upper input steering
diodes conducts and directs current to VS.
Excessively high current levels can flow with
increasingly higher VIN. As a result, the datasheet
specifications recommend that applications limit the
input current to 10 mA.
If the supply is not capable of sinking the current, VIN
may begin sourcing current to the operational
amplifier, and then take over as the source of positive
supply voltage. The danger in this case is that the
voltage can rise to levels that exceed the operational
amplifier absolute maximum ratings. In extreme but
rare cases, the absorption device triggers on while VS
and –VS are applied. If this event happens, a direct
current path is established between the VS and –VS
supplies. The power dissipation of the absorption
device is quickly exceeded, and the extreme internal
heating destroys the operational amplifier.
Another common question involves what happens to
the amplifier if an input signal is applied to the input
while the power supplies VS and/or –VS are at 0 V.
Again, it depends on the supply characteristic while at
0 V, or at a level below the input signal amplitude. If
the supplies appear as high impedance, then the
operational amplifier supply current may be supplied
by the input source via the current steering diodes.
This state is not a normal bias condition; the amplifier
most likely will not operate normally. If the supplies
are low impedance, then the current through the
steering diodes can become quite high. The current
level depends on the ability of the input source to
deliver current, and any resistance in the input path.
SBOS481B – JULY 2009 – REVISED APRIL 2012
DFN PACKAGE
The OPA211 is offered in an DFN-8 package (also
known as SON). The DFN package is a QFN
package with lead contacts on only two sides of the
bottom of the package. This leadless package
maximizes board space and enhances thermal and
electrical characteristics through an exposed pad.
DFN packages are physically small, and have a
smaller routing area, improved thermal performance,
and improved electrical parasitics. Additionally, the
absence of external leads eliminates bent-lead
issues.
The DFN package can be easily mounted using
standard printed circuit board (PCB) assembly
techniques. See Application Note QFN/SON PCB
Attachment (SLUA271) and Application Report Quad
Flatpack No-Lead Logic Packages (SCBA017), both
available for download at www.ti.com.
The exposed leadframe die pad on the bottom of
the package must be connected to V–. Soldering
the thermal pad improves heat dissipation and
enables specified device performance.
DFN LAYOUT GUIDELINES
The exposed leadframe die pad on the DFN package
should be soldered to a thermal pad on the PCB. A
mechanical drawing showing an example layout is
attached at the end of this data sheet. Refinements to
this layout may be necessary based on assembly
process requirements. Mechanical drawings located
at the end of this data sheet list the physical
dimensions for the package and pad. The five holes
in the landing pattern are optional, and are intended
for use with thermal vias that connect the leadframe
die pad to the heatsink area on the PCB.
Soldering the exposed pad significantly improves
board-level reliability during temperature cycling, key
push, package shear, and similar board-level tests.
Even with applications that have low-power
dissipation, the exposed pad must be soldered to the
PCB to provide structural integrity and long-term
reliability.
Copyright © 2009–2012, Texas Instruments Incorporated
Product Folder Link(s): OPA211-HT
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