LM3S1150 Datasheet, PDF (21/659 Pages) List of Unclassifed Manufacturers – Microcontroller

Stellaris^® LM3S1150 Microcontroller
Pulse Width Modulator (PWM) .................................................................................................... 519
Register 1: PWM Master Control (PWMCTL), offset 0x000 ................................................................ 529
Register 2: PWM Time Base Sync (PWMSYNC), offset 0x004 ........................................................... 530
Register 3: PWM Output Enable (PWMENABLE), offset 0x008 .......................................................... 531
Register 4: PWM Output Inversion (PWMINVERT), offset 0x00C ....................................................... 532
Register 5: PWM Output Fault (PWMFAULT), offset 0x010 ................................................................ 533
Register 6: PWM Interrupt Enable (PWMINTEN), offset 0x014 ........................................................... 534
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ........................................................ 535
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C ................................................ 536
Register 9: PWM Status (PWMSTATUS), offset 0x020 ...................................................................... 537
Register 10: PWM0 Control (PWM0CTL), offset 0x040 ....................................................................... 538
Register 11: PWM1 Control (PWM1CTL), offset 0x080 ....................................................................... 538
Register 12: PWM2 Control (PWM2CTL), offset 0x0C0 ...................................................................... 538
Register 13: PWM0 Interrupt Enable (PWM0INTEN), offset 0x044 ...................................................... 540
Register 14: PWM1 Interrupt Enable (PWM1INTEN), offset 0x084 ...................................................... 540
Register 15: PWM2 InterruptEnable (PWM2INTEN), offset 0x0C4 ...................................................... 540
Register 16: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 .................................................... 542
Register 17: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 .................................................... 542
Register 18: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 ................................................... 542
Register 19: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C ........................................... 543
Register 20: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C ........................................... 543
Register 21: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC ........................................... 543
Register 22: PWM0 Load (PWM0LOAD), offset 0x050 ....................................................................... 544
Register 23: PWM1 Load (PWM1LOAD), offset 0x090 ....................................................................... 544
Register 24: PWM2 Load (PWM2LOAD), offset 0x0D0 ....................................................................... 544
Register 25: PWM0 Counter (PWM0COUNT), offset 0x054 ................................................................ 545
Register 26: PWM1 Counter (PWM1COUNT), offset 0x094 ................................................................ 545
Register 27: PWM2 Counter (PWM2COUNT), offset 0x0D4 ............................................................... 545
Register 28: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................. 546
Register 29: PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................. 546
Register 30: PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................. 546
Register 31: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................. 547
Register 32: PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................. 547
Register 33: PWM2 Compare B (PWM2CMPB), offset 0x0DC ............................................................ 547
Register 34: PWM0 Generator A Control (PWM0GENA), offset 0x060 ................................................ 548
Register 35: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ................................................ 548
Register 36: PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ................................................ 548
Register 37: PWM0 Generator B Control (PWM0GENB), offset 0x064 ................................................ 551
Register 38: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ................................................ 551
Register 39: PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ................................................ 551
Register 40: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ................................................ 554
Register 41: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ................................................. 554
Register 42: PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ................................................ 554
Register 43: PWM0 Dead-Band Rising-Edge Delay (PWM0DBRISE), offset 0x06C ............................. 555
Register 44: PWM1 Dead-Band Rising-Edge Delay (PWM1DBRISE), offset 0x0AC ............................. 555
Register 45: PWM2 Dead-Band Rising-Edge Delay (PWM2DBRISE), offset 0x0EC ............................. 555
Register 46: PWM0 Dead-Band Falling-Edge-Delay (PWM0DBFALL), offset 0x070 ............................. 556
Register 47: PWM1 Dead-Band Falling-Edge-Delay (PWM1DBFALL), offset 0x0B0 ............................. 556
July 15, 2014
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