LM3561 Datasheet, PDF (21/36 Pages) Texas Instruments – LM3561 Synchronous Boost Converter with 600mA High Side LED Driver and I 2 C-Compatible Interface

Flags Register and Fault Indicators
The Flags Register contains the Interrupt and Fault indicators.
Seven flags are available in the Flags Register. These include
a Flash Timeout flag (TO), a Thermal Shutdown flag (TSD) ,
an LED Failure flag (LEDF) , an LED Thermal flag (NTC), and
a VIN Monitor flag. Additionally, two interrupt flag bits TX1
interrupt and TX2 interrupt indicate a change of state of the
TX1/TORCH pin (TX1 mode) and TX2/GPIO2/INT pin (TX2
mode) . Reading back a '1' indicates the TX lines have
changed state since the last read of the Flags Register. A read
of the Flags Register resets the flag bits.
FLASH TIMEOUT
The Flash Timeout Flag (TO), (bit [0] of the Flags Register)
reads back a '1' if the LM3561 is active in Flash Mode and the
timeout period expires before the flash pulse is terminated.
The flash pulse can be terminated before the timeout period
expires by pulling the STROBE pin low (with STR bit '0'), or
by writing a ‘0’ to bits [1:0] of the Enable Register. The TO flag
is reset to (0) by pulling HWEN low, removing power to the
LM3561, reading the Flags Register, or when the next Flash
pulse is triggered.
THERMAL SHUTDOWN
When the LM3561’s die temperature reaches +150°C the
boost converter shuts down and the NFET and PFET turn off.
Additionally, both current sources (LED and LEDI/NTC) turn
off. When the thermal shutdown threshold is tripped a '1' gets
written to bit [1] of the Flag Register (Thermal Shutdown bit).
The LM3561 will start up again when the die temperature falls
to below +135°C, the Flags Register is read back, and the
device is re-enabled.
LED FAULT
The LED Fault flag (bit 2 of the Flags Register) reads back a
'1' if the part is active in Flash or Torch mode and the current
source (LED) experiences an open or short condition. An LED
open condition is signaled if the OVP threshold is crossed at
OUT. An LED short condition is signaled if the voltage at LED
goes below 500mV.
There is a delay of 250µs before the LEDF flag is valid on a
LED short. This is the time from when V_LED falls below the
LED short threshold of 500mV (typical) to when the fault flag
is valid. There is a 2µs delay from when the LEDF flag is valid
on an LED open. This delay is the time between when the
OVP threshold is triggered and when the fault flag is valid.
The LEDF flag can only be reset to (0) by pulling HWEN low,
removing power to the LM3561, or reading the Flags Register.
LED THERMAL FAULT
The NTC flag (bit [5] of the Flags Register) reads back a '1' if
the LM3561 is active in Flash or Torch mode, the device is in
NTC mode, and the voltage at LEDI/NTC has fallen below
V_TRIP (1V typical). When this has happened and the LM3561
has been forced into Torch or LED shutdown, depending on
the state of Configuration Register 2 bit [1], the voltage at LE-
DI/NTC must rise above the V_TRIP threshold and the Flags
Register must be read in order to place the device back in
normal operation. (see Led Thermal Comparator (NTC
Mode) section for more details).
INPUT VOLTAGE MONITOR FAULT
The V_IN Monitor Flag (bit [7] of the Flags Register) reads back
a '1' when the Input Voltage Monitor is enabled and V_IN falls
below the programmed (V_{IN_TH}). The input voltage must rise
above V_{IN_TH} and the Flags register must be read back in or-
der to resume normal operation after the LED current has
been forced to Torch mode or turned off due to a VIN Monitor
event.
TX1 AND TX2 INTERRUPT FLAGS
The TX1 and TX2 interrupt flags (bits [3] and [4] of the Flags
register) indicate a TX event on the TX1 or TX2 pins. Bit 3 will
read back a '1' if TX1/TORCH is in TX1 mode and the pin has
changed from low to high since the last read of the Flags
Register. Bit [4] will read back a '1' if TX2 is in TX2 mode and
the pin has had a TX event since the last read of the Flags
Register. A read of the Flags Register automatically resets
these bits.
A TX event can be either a high to low transition or a low to
high transition depending on the setting of the TX1 or TX2
polarity bits (see Table 10).
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