LM10502 Datasheet, PDF (21/35 Pages) Texas Instruments – Dual Buck + LDO Power Management Unit

LM10502
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Device Operating Modes
SNVS884B – AUGUST 2012 – REVISED MAY 2013
STARTUP SEQUENCE
The startup mode of the LM10502 will depend on the input voltage. Once VIN reaches the UVLO threshold, there
is a 15 msec delay before the LM10502 determines how to set up the buck regulators. If V_IN is greater than 3.6V,
the bucks will start up as the standard regulators. The 2 buck regulators are staggered during startup to avoid
large inrush currents. There is a fixed delay of 2 msec between the startup of each regulator.
The Startup Sequence will be:
1. 15 msec (±30%) delay after VIN above UVLO
2. LDO → 3V
3. 2 msec delay
4. Buck 1 → 1.8V
5. 2 msec delay
6. Buck 2 → 1.2V
5.75V
5.65V
2.9V
~3.2V
VCOMP_ FALL
2.6V
~2.25V
VIN
0V
BG / BIAS
UVLO internal status
LDO Vout
Buck1 Vout
Buck2 Vout
15 ms
3.0V
2 ms
1.8V
1.2V
2 ms
15 ms
3.0V
1.8V
2ms
1.2V
2ms
IRQ (LDO
driving VIN_IO)
OVLO internal status
UVLO
STARTUP
OVLO
STARTUP
Figure 23. Operating Modes
UVLO
POWER-ON DEFAULT AND DEVICE ENABLE
The device is always enabled and the LDO is always on, unless outside of operating voltage range. There is no
LM10502 Enable Pin. Once V_IN reaches a minimum required input Voltage the power-up sequence will be
started automatically and the startup sequence will be initiated. Once the device is started, the output voltage of
the Bucks can be individually disabled by accessing their corresponding BKEN register bits (BUCK CONTROL).
RESET: PIN FUNCTION
The RESET pin is internally pulled high. If the reset pin is pulled low, the device will perform a complete reset of
all the registers to their default states. This means that all of the voltage settings on the regulators will go back to
their default states.
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