DS32EL0124_15 Datasheet, PDF (21/34 Pages) Texas Instruments – DS32EL0124 , DS32ELX0124 125 MHz - 312.5 MHz FPGA-Link Deserializer with DDR LVDS Parallel Interface

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2.5V 3.3V
0.1 PF
0.1 PF
3.3V
22 PF
9.1 k:
30 nF
7, 25,
49
35
1, 15, 18,
28, 36
16 ₊
RXIN0
17 ^-
RXOUT4 ^{+ 47}
- 48
19 _+RXIN1
20 -
RXOUT3 ^{+ 45}
- 46
RXOUT2 ^{+ 43}
28
VDDPLL
- 44
RXOUT1 ^{+ 41}
DS32ELX0124
-
RXOUT0 ⁺
42
39
14
- 40
VOD_CTRL
RXCLKOUT ^{+ 37}
27 _{LF_CP}
- 38
26
LF_REF
3
GPIO0
4
GPIO1
11
GPIO2
56
RESET ³⁰
31
LOCK
SDA ³²
SCK ³³
SMB_CS ³⁴
21 22
3.3V
3.3V
0.1 PF
0.1 PF
DS32EL0124, DS32ELX0124
SNLS284K – MAY 2008 – REVISED APRIL 2013
Figure 14. Typical Interface Circuit
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