OPA832_15 Datasheet, PDF (20/30 Pages) Texas Instruments – Low-Power, Single-Supply, Fixed-Gain Video Buffer Amplifier

OPA832
SBOS266E − JUNE 2003 − REVISED AUGUST 2008
should not be in close proximity to the signal I/O pins.
Avoid narrow power and ground traces to minimize in-
ductance between the pins and the decoupling capaci-
tors. Each power-supply connection should always be
decoupled with one of these capacitors. An optional
supply decoupling capacitor (0.1µF) across the two
power supplies (for bipolar operation) will improve 2nd-
harmonic distortion performance. Larger (2.2µF to
6.8µF) decoupling capacitors, effective at lower fre-
quency, should also be used on the main supply pins.
These may be placed somewhat farther from the device
and may be shared among several devices in the same
area of the PC board.
c) Careful selection and placement of external compo-
nents will preserve the high-frequency performance.
Resistors should be a very low reactance type. Surface-
mount resistors work best and allow a tighter overall lay-
out. Metal film or carbon composition axially-leaded re-
sistors can also provide good high-frequency
performance. Again, keep their leads and PC board
traces as short as possible. Never use wire-wound type
resistors in a high-frequency application. Since the out-
put pin is the most sensitive to parasitic capacitance, al-
ways position the series output resistor, if any, as close
as possible to the output pin. Other network compo-
nents, such as noninverting input termination resistors,
should also be placed close to the package.
d) Connections to other wideband devices on the board
may be made with short direct traces or through on-
board transmission lines. For short connections, con-
sider the trace and the input to the next device as a
lumped capacitive load. Relatively wide traces (50mils
to 100mils) should be used, preferably with ground and
power planes opened up around them. Estimate the to-
tal capacitive load and set R_S from the typical character-
istic curve Recommended R_S vs Capacitive Load. Low
parasitic capacitive loads (< 5pF) may not need an R_S
since the OPA832 is nominally compensated to operate
with a 2pF parasitic load. Higher parasitic capacitive
loads without an R_S are allowed as the signal gain in-
creases (increasing the unloaded phase margin). If a
long trace is required, and the 6dB signal loss intrinsic
to a doubly-terminated transmission line is acceptable,
implement a matched impedance transmission line us-
ing microstrip or stripline techniques (consult an ECL
design handbook for microstrip and stripline layout
techniques). A 50Ω environment is normally not neces-
sary onboard, and in fact, a higher impedance environ-
ment will improve distortion as shown in the distortion
versus load plots. With a characteristic board trace im-
pedance defined (based on board material and trace di-
mensions), a matching series resistor into the trace
from the output of the OPA832 is used as well as a ter-
minating shunt resistor at the input of the destination de-
vice. Remember also that the terminating impedance
will be the parallel combination of the shunt resistor and
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the input impedance of the destination device; this total
effective impedance should be set to match the trace
impedance. If the 6dB attenuation of a doubly-termi-
nated transmission line is unacceptable, a long trace
can be series-terminated at the source end only. Treat
the trace as a capacitive load in this case and set the
series resistor value as shown in the typical characteris-
tic curve Recommended R_S vs Capacitive Load. This
will not preserve signal integrity as well as a doubly-ter-
minated line. If the input impedance of the destination
device is low, there will be some signal attenuation due
to the voltage divider formed by the series output into
the terminating impedance.
e) Socketing a high-speed part is not recommended.
The additional lead length and pin-to-pin capacitance
introduced by the socket can create an extremely
troublesome parasitic network which can make it al-
most impossible to achieve a smooth, stable frequency
response. Best results are obtained by soldering the
OPA832 onto the board.
INPUT AND ESD PROTECTION
The OPA832 is built using a very high-speed comple-
mentary bipolar process. The internal junction break-
down voltages are relatively low for these very small ge-
ometry devices. These breakdowns are reflected in the
Absolute Maximum Ratings table. All device pins are
protected with internal ESD protection diodes to the
power supplies, as shown in Figure 11.
+V_CC
External
Pin
Internal
Circuitry
− V_CC
Figure 11. Internal ESD Protection
These diodes provide moderate protection to input
overdrive voltages above the supplies as well. The
protection diodes can typically support 30mA continu-
ous current. Where higher currents are possible (that is,
in systems with ±15V supply parts driving into the
OPA832), current-limiting series resistors should be
added into the two inputs. Keep these resistor values as
low as possible, since high values degrade both noise
performance and frequency response.