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LMH6517_14 Datasheet, PDF (20/34 Pages) Texas Instruments – Low Power, Low Noise, IF and Baseband, Dual 16 bit ADC Driver With Digitally Controlled Gain
LMH6517
SNOSB19J – NOVEMBER 2008 – REVISED NOVEMBER 2011
www.ti.com
FPGA/DSP/PC/ASIC
ga[5:0]
gb[5:0]
pd
VSS
6
6
VSS
DVGA
latcha
ga[5:0]
gb[5:0]
latchb
pd
cmode
VSS
Pins: 13
MSPS: 333
High Skew
Figure 48. Parallel Mode Connection Not Using Latch Pins (Latch pins tied to logic low state)
FPGA/DSP/PC/ASIC
latcha
6
ga/gb[5:0]
latchb
pd
DVGA
latcha
ga[5:0]
gb[5:0]
latchb
pd
cmode
VSS
Pins: 9
MSPS: 62.5
Low Skew
Figure 49. Parallel Mode Connection Using Latch Pins to Mulitplex Digital Data
SPI COMPATIBLE SERIAL INTERFACE (MOD1= 1, MOD0 = 0)
Serial interface allows a great deal of flexibility in gain programming and reduced board complexity. Using only 4
wires for both channels allows for significant board space savings. The trade off for this reduced board
complexity is slower response time in gain state changes. For systems where gain is changed only infrequently
or where only slow gain changes are required serial mode is the best choice.
20
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