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| TPS659110 Datasheet, PDF (2/10 Pages) Texas Instruments – Power Management Unit with DCDC Controller | |||
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TPS659110, TPS659112, TPS659113
SWCS067B â AUGUST 2011 â REVISED NOVEMBER 2011
www.ti.com
VCC7
VRTC
OSC32KIN
OSC32KOUT
CLK32KOUT
SDA_SDI
SCL_SCK
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8
EN1
EN2
INT1
SLEEP
PWRON
BOOT1
PWRHOLD
PWRDN
HDRST
NRESPWRON
NRESPWRON2
VREF
TESTV
REFGND
1 to 3.3 V, LDO3
100-mV step
VCC5
1 to 3.3 V, LDO4
50-mV step
1 to 3.3 V, LDO5
100-mV step
VCC4
VCCS
CBB
VRTC (LDO)
and POR
BACKUP
Mgmt
AGND
AGND
OSC
32-kHz
REFGND
VDDIO
I2C
Real
time
clock
Bus
control
I2C
Power
control
state
machine
Analog
references
LDO3
200 mA
Watchdog
Test interface
LDO4
50 mA
LDO5
300 mA
VDD1
0.6 to 1.5 V,
12.5-mV step,
1.5 A
VDD2
0.6 to 1.5 V,
12.5-mV step,
1.5 A
Con(tSrMoPllSe)r
0.6 to 1.4 V,
12.5-mV step
VIO
1.5/1.8(S/2M.5P/S3).3V
1.5 A
LDO1
320 mA
VCC1
3
SW1
GND1
VFB1
VCC2
3
SW2
GND2
VFB2
VBST
DRVH
3
SW
DRVL
Cboost
VOUT
VFB
V5IN
TRIP
C1
Rtrip
GNDC
VCCIO
3
SWIO
GNDIO
VFBIO
VDDIO
CVIN
Co
5V
CV5IN
LDO1
1 to 3.3 V,
50-mV step
LDO2
320 mA
VCC6
1 to 3.3 V,
LDO2 50-mV step
LDO7
300 mA
1 to 3.3 V,
LDO7 100-mV step
LDO8
300(LDmOA)
VCC3
LDO8 1 to 3.3 V,
100-mV step
COMP
1
COMP
2
LDO6
300 mA
Figure 1. Top-Level Diagram
LDO6 1 to 3.3 V,
100-mV step
SWCS067-001
2
Copyright © 2011, Texas Instruments Incorporated
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