TPS542951 Datasheet, PDF (2/23 Pages) Texas Instruments – 2A/3A Dual Channel Synchronous Step-Down Switcher with Integrated FET

TPS542951
SLVSBI4 – JULY 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
T_A
–40℃ to 85℃
ORDERING INFORMATION⁽¹⁾
PACKAGE^{(2) (3)}
ORDERING PART NUMBER
PWP
TPS542951PWPR
TPS542951PWP
PINS
16
OUTPUT SUPPLY
Tape-and-Reel
Tube
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) All packaging options have Cu NIPDAU lead/ball finish.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)^{(1) (2)}
VALUE
UNIT
VIN1, VIN2, EN1, EN2
–0.3 to 20
VBST1, VBST2
–0.3 to 26
VBST1, VBST2 (10ns transient)
–0.3 to 28
Input voltage range
VBST1–SW1 , VBST2–SW2
–0.3 to 6.5
V
VFB1, VFB2
–0.3 to 6.5
SW1, SW2
–2 to 20
SW1, SW2 (10ns transient)
–3 to 22
Output voltage range
VREG5, SS1, SS2
PGND1, PGND2
–0.3 to 6.5
V
–0.3 to 0.3
Electrostatic discharge
Human Body Model (HBM)
Charged Device Model (CDM)
2
kV
500
V
T_A
T_STG
T_J
Operating ambient temperature range
Storage temperature range
Junction temperature range
–40 to 85
°C
–55 to 150
°C
–40 to 150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" are not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltages are with respect to IC GND terminal.
THERMAL INFORMATION
THERMAL METRIC⁽¹⁾
θ_JA
θ_JCtop
θ_JB
ψ_JT
ψ_JB
θ_JCbot
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-board thermal resistance
Junction-to-top characterization parameter
Junction-to-board characterization parameter
Junction-to-case (bottom) thermal resistance
TPS542951
PWP (16) PINS
47.5
27.1
20.8
1.0
20.6
2.7
UNITS
°C/W
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
2
Submit Documentation Feedback
Product Folder Link(s): TPS542951
Copyright © 2012, Texas Instruments Incorporated