TAS5721 Datasheet, PDF (2/71 Pages) Texas Instruments – Digital Audio Power Amplifier with EQ, DRC, 2.1 Support, and Headphone/Line Driver

TAS5721
SLOS739 – JULY 2012
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DESCRIPTION
The TAS5721 is an efficient, digital-input audio amplifier for driving 2.0 speaker systems configured as a bridge
tied load (BTL), 2.1 systems with two satellite speakers and one subwoofer, or in PBTL systems driving a single
speaker configured as a parallel bridge tied load (PBTL). One serial data input allows processing of up to two
discrete audio channels and seamless integration to most digital audio processors and MPEG decoders. The
device accepts a wide range of input data formats and sample rates. A fully programmable data path routes
these channels to the internal speaker drivers.
The TAS5721 is a slave-only device, receiving all clocks from external sources. The TAS5721 operates with a
PWM carrier frequency between a 384-kHz switching rate and a 288-KHz switching rate, depending on the input
sample rate. Oversampling, combined with a fourth-order noise shaper, provides a flat noise floor and excellent
dynamic range from 20 Hz to 20 kHz.
An integrated ground centered DirectPath™ combination headphone amplifier and 2V_RMS line driver is integrated
in the TAS5721.
DRVDD
DVDD AVDD
PVDD
MCLK
LRCLK
SCLK
SDIN
TAS5721
MCLK Monitoring
and Watchdog
Serial Audio Port
(SAP)
Sample Rate
Auto-Detect
PLL
DRVDD
Internal Regulation and Power Distribution
Internal Voltage Supplies
Power-On Reset
(POR)
Digital Audio
Processor
(DAP)
Sample Rate
Converter
(SRC)
Digital to PWM
Converter
(DPC)
3 Ch. PWM
Modulator
Noise Shaping
Click and Pop
Suppression
Open Loop 4 Channel
PWM Amplifier
Sensing and
Protection
Temperature
Short Circuits
PVDD Voltage
Output Current
Fault Notification
SPK_OUTA
SPK_OUTB
SPK_OUTC
SPK_OUTD
Internal Register/State Machine Interface
I²C Control Port
DRVDD
Charge Pump
Stereo Headphone
Amplifier
DR_OUTA
DR_OUTB
SCL
SDA
PDN RST
DR_CP DR_CN DR_VSS DR_INA DR_INB
Figure 1. DAP Process Structure
2
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