SN74LVC1G240_16 Datasheet, PDF (2/22 Pages) Texas Instruments – Single Buffer/Driver With 3-State Output

SN74LVC1G240
SCES305L – JANUARY 2001 – REVISED DECEMBER 2013
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These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Function Table
INPUTS
OE
A
OUTPUT
Y
L
H
L
L
L
H
H
X
Z
Logic Diagram (Positive Logic)
1
OE
A2
4Y
Absolute Maximum Ratings⁽¹⁾
over operating free-air temperature range (unless otherwise noted)
MIN
MAX UNIT
V_CC Supply voltage range
V_I Input voltage range⁽²⁾
V_O Voltage range applied to any output in the high-impedance or power-off state⁽²⁾
V_O Voltage range applied to any output in the high or low state^{(2) (3)}
I_IK Input clamp current
V_I < 0
I_OK Output clamp current
V_O < 0
I_O Continuous output current
Continuous current through V_CC or GND
DBV package
θ_JA Package thermal impedance⁽⁴⁾
DCK package
YZP package
–0.5
6.5
–0.5
6.5
–0.5
6.5
–0.5 V_CC + 0.5
–50
–50
±50
±100
206
252
132
V
V
V
V
mA
mA
mA
mA
°C/W
T_stg Storage temperature range
–65
150 °C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of V_CC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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