OPA2832 Datasheet, PDF (2/37 Pages) National Semiconductor (TI) – Dual, Low-Power, High-Speed, Fixed-Gain Operational Amplifier

OPA2832
SBOS327C – FEBRUARY 2005 – REVISED AUGUST 2008 ............................................................................................................................................. www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION⁽¹⁾
PRODUCT PACKAGE-LEAD
PACKAGE
DESIGNATOR
OPA2832 SO-8 Surface-Mount
D
OPA2832
MSOP-8
DGK
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
–40°C to +85°C
PACKAGE
MARKING
OPA2832
A61
ORDERING
NUMBER
OPA2832ID
OPA2832IDR
OPA2832IDGK
OPA2832IDGKR
TRANSPORT
MEDIA, QUANTITY
Rails, 100
Tape and Reel, 2500
Tape and Reel, 250
Tape and Reel, 2500
(1) For the most current package and ordering information see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS⁽¹⁾
Power Supply
Internal Power Dissipation
Differential Input Voltage⁽²⁾
Input Voltage Range
Storage Voltage Range: D, DGK
Lead Temperature (soldering, 10s)
Junction Temperature (T_J)
ESD Rating:
Human Body Model (HBM)
Charge Device Model (CDM)
Machine Model (MM)
11V_DC
See Thermal Characteristics
±1.2V
–0.5V to ±V_S + 0.3V
–65°C to +125°C
+300°C
+150°C
2000V
1000V
200V
(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may
degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those specified is not supported.
(2) Noninverting input to internal inverting mode.
Top View
SO, MSOP
Output ₁ 1
−Input _{1 2}
400Ω
+Input ₁ 3
−V_S 4
400Ω
400Ω
8 +V_S
400Ω
7 Output ₂
6 ^−Input ₂
5 +Input ₂
2
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