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LP38690-ADJ Datasheet, PDF (2/22 Pages) Texas Instruments – LP38692-ADJ 1A Low Dropout CMOS Linear Regulators with Adjustable Output Stable with Ceramic Output Capacitors
LP38690-ADJ, LP38692-ADJ
SNVS323H – DECEMBER 2004 – REVISED APRIL 2013
Connection Diagrams
VEN 1
ADJ 2
VOUT 3
VIN 4
5 GND
Figure 1. SOT-223 (LP38692MP-ADJ) – Top View
See Package Number NDC0005A
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VIN 1
GND 2
N/C 3
Exposed Pad
on Bottom
(DAP)
6 VIN
5 VOUT
4 ADJ
VIN 1
GND 2
VEN 3
Exposed Pad
on Bottom
(DAP)
6 VIN
5 VOUT
4 ADJ
Figure 2. 6-Lead WSON (LP38690SD-ADJ) – Top
View
See Package Number NGG0006A
Figure 3. 6-Lead WSON (LP38692SD-ADJ) Top
View
See Package Number NGG
Pin
VIN
GND
VOUT
VEN
ADJ
DAP
PIN DESCRIPTIONS
Description
This is the input supply voltage to the regulator. For WSON package devices, both VIN pins must be tied
together for full current operation (500mA maximum per pin).
Circuit ground for the regulator. For the SOT-223 package this is thermally connected to the die and functions
as a thermal connection when the soldered down to a large copper plane.
Regulated output voltage.
The enable pin allows the part to be turned ON and OFF by pulling this pin high or low.
The adjust pin is used to set the regulated output voltage by connecting it to the external resistors R1 and R2
(see Typical Application Circuits).
WSON Only - The DAP (Exposed Pad) functions as a thermal connection when soldered to a copper plane.
See WSON MOUNTING section in APPLICATION HINTS for more information.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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