DS91M124_13 Datasheet, PDF (2/15 Pages) Texas Instruments – 125 MHz 1:4 M-LVDS Repeater with LVCMOS Input

DS91M124
SNLS287E – AUGUST 2008 – REVISED APRIL 2013
Pin Diagram
DE0 1
DE1 2
DE2 3
VDD 4
GND 5
DI 6
N/C 7
DE3 8
16 B0
15 A0
14 A1
13 B1
12 B2
11 A2
10 A3
9
B3
Figure 1. SOIC Package
See Package Number D0016A
www.ti.com
Logic Diagram
DE0
B0
A0
DE1
B1
A1
DI
B2
A2
DE2
B3
A3
DE3
Number
1, 2, 3, 8
6
5
10, 11, 14, 15
9, 12, 13, 16
4
7
Name
DE
DI
GND
A
B
V_DD
N/C
I/O, Type
I, LVCMOS
I, LVCMOS
Power
O, M-LVDS
O, M-LVDS
Power
N/A
Pin Descriptions
Description
Driver enable pin: When a DE pin is low, the corresponding driver output is
disabled. When a DE pin is high, the corresponding driver output is enabled.
There is a 300 kΩ pulldown resistor on each DE pin.
Driver input pin.
Ground pin.
Non-inverting driver output pins.
Inverting driver output pins.
Power supply pin, +3.3V ± 0.3V
NO CONNECT pin.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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