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CD74HC08-EP Datasheet, PDF (2/9 Pages) Texas Instruments – QUADRUPLE 2-INPUT POSITIVE-AND GATES
CD74HC08ĆEP
QUADRUPLE 2ĆINPUT POSITIVEĆAND GATES
SCLS477B − APRIL 2003 − REVISED APRIL 2004
logic diagram (positive logic)
A
Y
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < −0.5 V or VI > VCC + 0.5 V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < −0.5 V or VO > VCC + 0.5 V) (see Note 1) . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO > −0.5 or VO < VCC + 0.5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 180°C/W
Maximum junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Lead temperature (during soldering):
At distance 1/16 ± 1/32 inch (1,59 ± 0,79 mm) from case for 10 s max . . . . . . . . . . . . . . . . . . . . . . . 300°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
MIN NOM MAX UNIT
VCC Supply voltage
VIH High-level input voltage
VIL
Low-level input voltage
VI
Input voltage
VO
Output voltage
∆t/∆v Input transition rise/fall time
TA
Operating free-air temperature
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
Q suffix
M suffix
2
1.5
3.15
4.2
0
0
−40
−55
5
6V
V
0.5
1.35 V
1.8
VCC V
VCC V
1000
500 ns
400
125
°C
125
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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